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From:   Benoit HOUYERE <benoit.houyere@st.com>
To:     Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
        "amirmizi6@gmail.com" <amirmizi6@gmail.com>
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Subject: RE: [PATCH v4 4/7] tpm: tpm_tis: Fix expected bit handling and send
 all bytes in one shot without last byte in exception
Thread-Topic: [PATCH v4 4/7] tpm: tpm_tis: Fix expected bit handling and send
 all bytes in one shot without last byte in exception
Thread-Index: AQHWB1ZoDft9Zu6RoU68XNbFk/pAW6hjMfyw
Date:   Tue, 31 Mar 2020 21:34:28 +0000
Message-ID: <19c8ae3023404ae9affcb1ce04b7ee4b@SFHDAG3NODE3.st.com>
References: <20200331113207.107080-1-amirmizi6@gmail.com>
 <20200331113207.107080-5-amirmizi6@gmail.com>
 <20200331121720.GB9284@linux.intel.com>
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> On Tue, Mar 31, 2020 at 02:32:04PM +0300, amirmizi6@gmail.com wrote:
> > From: Amir Mizinski <amirmizi6@gmail.com>
> >=20
> > Today, actual implementation for send massage is not correct. We check=
=20
> > and loop only on TPM_STS.stsValid bit and next we single check=20
> > TPM_STS.expect bit value.
> > TPM_STS.expected bit shall be checked in the same time of=20
> > TPM_STS.stsValid, and should be repeated until timeout_A.
> > To aquire that, "wait_for_tpm_stat" function is modified to=20
> > "wait_for_tpm_stat_result". this function read regulary status=20
> > register and check bit defined by "mask" to reach value defined in "mas=
k_result"
> > (that way a bit in mask can be checked if reached 1 or 0).
> >=20
> > Respectively, to send message as defined in=20
> >  TCG_DesignPrinciples_TPM2p0Driver_vp24_pubrev.pdf, all bytes should be=
=20
> > sent in one shot instead of sending last byte in exception.
> >=20
> > This improvment was suggested by Benoit Houyere.

>Use suggested-by tag.

>Also if something is not correct, please provide a fixes tag.

> You are speaking now in theoretical level, which we don't really care tha=
t much. Is this causing you real issues? If the answer is yes, please repor=
t them. If the > >answer is no, we don't need this.

> /Jarkko

I2C TPM specification introduce CRC calculation on TPM command bytes. CRC c=
alculation take place from last byte acquired to  TPM_STS.expected bit rese=
t (=3D0) .It introduces latency and actual incorrect implementation becomes=
 visible now under I2C on the contrary before that's all.=20
The case where TPM keeps TPM_STS.expected bit set  with TPM_STS.stsValid se=
t after last byte reception is possible and is not an issue. It's not theor=
etical level, it's practical level now.