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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 1 Apr 2020 07:13:42 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 0316Cckf48955900 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 1 Apr 2020 06:12:39 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 510EDA405B; Wed, 1 Apr 2020 06:13:42 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B58F2A405D; Wed, 1 Apr 2020 06:13:38 +0000 (GMT) Received: from bangoria.ibmuc.com (unknown [9.199.48.114]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 1 Apr 2020 06:13:38 +0000 (GMT) From: Ravi Bangoria To: mpe@ellerman.id.au, mikey@neuling.org Cc: apopple@linux.ibm.com, paulus@samba.org, npiggin@gmail.com, christophe.leroy@c-s.fr, naveen.n.rao@linux.vnet.ibm.com, peterz@infradead.org, jolsa@kernel.org, oleg@redhat.com, fweisbec@gmail.com, mingo@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, ravi.bangoria@linux.ibm.com Subject: [PATCH v2 00/16] powerpc/watchpoint: Preparation for more than one watchpoint Date: Wed, 1 Apr 2020 11:42:53 +0530 X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 x-cbid: 20040106-0028-0000-0000-000003EFD834 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20040106-0029-0000-0000-000024B55D11 Message-Id: <20200401061309.92442-1-ravi.bangoria@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-03-31_07:2020-03-31,2020-03-31 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 malwarescore=0 mlxlogscore=678 impostorscore=0 clxscore=1011 phishscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004010049 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org So far, powerpc Book3S code has been written with an assumption of only one watchpoint. But future power architecture is introducing second watchpoint register (DAWR). Even though this patchset does not enable 2nd DAWR, it make the infrastructure ready so that enabling 2nd DAWR should just be a matter of changing count. Existing functionality works fine with the patchset. I've tested it with perf, ptrace(gdb), xmon. All hw-breakpoint selftests are passing as well. And I've build tested for 8xx and 'AMCC 44x, 46x or 47x'. Note: kvm or PowerVM guest is not enabled yet. v1: https://lore.kernel.org/linuxppc-dev/20200309085806.155823-1-ravi.bangoria@linux.ibm.com v1->v2: - No major functionality changes. Changed few minor things as suggested by Christophe - Fixed build failure reported by 'kbuild test robot ' for patch #9. - Rebased to powerpc/next plus Christophe's ptrace series[1][2] [1]: https://lore.kernel.org/linuxppc-dev/cover.1582848567.git.christophe.leroy@c-s.fr [2]: https://lore.kernel.org/linuxppc-dev/5558d8c22ff0ed03cb5392798564dd203bd68501.1584787012.git.christophe.leroy@c-s.fr Ravi Bangoria (16): powerpc/watchpoint: Rename current DAWR macros powerpc/watchpoint: Add SPRN macros for second DAWR powerpc/watchpoint: Introduce function to get nr watchpoints dynamically powerpc/watchpoint/ptrace: Return actual num of available watchpoints powerpc/watchpoint: Provide DAWR number to set_dawr powerpc/watchpoint: Provide DAWR number to __set_breakpoint powerpc/watchpoint: Get watchpoint count dynamically while disabling them powerpc/watchpoint: Disable all available watchpoints when !dawr_force_enable powerpc/watchpoint: Convert thread_struct->hw_brk to an array powerpc/watchpoint: Use loop for thread_struct->ptrace_bps powerpc/watchpoint: Introduce is_ptrace_bp() function powerpc/watchpoint: Use builtin ALIGN*() macros powerpc/watchpoint: Prepare handler to handle more than one watcnhpoint powerpc/watchpoint: Don't allow concurrent perf and ptrace events powerpc/watchpoint/xmon: Don't allow breakpoint overwriting powerpc/watchpoint/xmon: Support 2nd dawr arch/powerpc/include/asm/cputable.h | 6 +- arch/powerpc/include/asm/debug.h | 2 +- arch/powerpc/include/asm/hw_breakpoint.h | 31 +- arch/powerpc/include/asm/processor.h | 6 +- arch/powerpc/include/asm/reg.h | 6 +- arch/powerpc/include/asm/sstep.h | 2 + arch/powerpc/kernel/dawr.c | 23 +- arch/powerpc/kernel/hw_breakpoint.c | 636 ++++++++++++++++++---- arch/powerpc/kernel/process.c | 82 +-- arch/powerpc/kernel/ptrace/ptrace-noadv.c | 72 ++- arch/powerpc/kernel/ptrace/ptrace32.c | 4 +- arch/powerpc/kernel/signal.c | 9 +- arch/powerpc/kvm/book3s_hv.c | 12 +- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 18 +- arch/powerpc/xmon/xmon.c | 99 +++- kernel/events/hw_breakpoint.c | 16 + 16 files changed, 806 insertions(+), 218 deletions(-) -- 2.21.1