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[209.132.180.67]) by mx.google.com with ESMTP id l20si471156otk.242.2020.03.31.23.57.39; Tue, 31 Mar 2020 23:57:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=FN32Obsp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731842AbgDAGoF (ORCPT + 99 others); Wed, 1 Apr 2020 02:44:05 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:35118 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730426AbgDAGoF (ORCPT ); Wed, 1 Apr 2020 02:44:05 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 48sc9Y1N7Lz9tyYt; Wed, 1 Apr 2020 08:44:01 +0200 (CEST) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=FN32Obsp; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id LfJ-CBpdfzbp; Wed, 1 Apr 2020 08:44:01 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 48sc9Y00mcz9tyYB; Wed, 1 Apr 2020 08:44:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1585723441; bh=EJxaAM8iaxCoKvwnCcqzzUCDRBm8vznM2R2KHic5ohw=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=FN32Obsp1rPQUh1rFzsVLF87dmCSh7UZ51+tKQG3FaXi9kX88VGuU/mZSBaIYgWWo Sxblhq3vUR3mF/P3rJYpIY68eG+gf8hLN+R/v9mS9AMKezaSHGN1mCrUnVCX6knFV5 8KJ5kaAsPk8wJdiQ5FabmGL5iamWy0qrJtzy326k= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id DA0EB8B7B3; Wed, 1 Apr 2020 08:44:01 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id 65prwT2dX8la; Wed, 1 Apr 2020 08:44:01 +0200 (CEST) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 3C7A08B778; Wed, 1 Apr 2020 08:43:59 +0200 (CEST) Subject: Re: [PATCH v2 09/16] powerpc/watchpoint: Convert thread_struct->hw_brk to an array To: Ravi Bangoria , mpe@ellerman.id.au, mikey@neuling.org Cc: apopple@linux.ibm.com, paulus@samba.org, npiggin@gmail.com, naveen.n.rao@linux.vnet.ibm.com, peterz@infradead.org, jolsa@kernel.org, oleg@redhat.com, fweisbec@gmail.com, mingo@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <20200401061309.92442-1-ravi.bangoria@linux.ibm.com> <20200401061309.92442-10-ravi.bangoria@linux.ibm.com> From: Christophe Leroy Message-ID: Date: Wed, 1 Apr 2020 08:43:57 +0200 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <20200401061309.92442-10-ravi.bangoria@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 01/04/2020 à 08:13, Ravi Bangoria a écrit : > So far powerpc hw supported only one watchpoint. But Future Power > architecture is introducing 2nd DAWR. Convert thread_struct->hw_brk > into an array. > > Signed-off-by: Ravi Bangoria > --- > arch/powerpc/include/asm/processor.h | 2 +- > arch/powerpc/kernel/process.c | 61 ++++++++++++++--------- > arch/powerpc/kernel/ptrace/ptrace-noadv.c | 40 +++++++++++---- > arch/powerpc/kernel/ptrace/ptrace32.c | 4 +- > arch/powerpc/kernel/signal.c | 9 +++- > 5 files changed, 77 insertions(+), 39 deletions(-) > > diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h > index 90f6dbc7ff00..65b03162cd67 100644 > --- a/arch/powerpc/include/asm/processor.h > +++ b/arch/powerpc/include/asm/processor.h > @@ -187,7 +187,7 @@ struct thread_struct { > */ > struct perf_event *last_hit_ubp; > #endif /* CONFIG_HAVE_HW_BREAKPOINT */ > - struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */ > + struct arch_hw_breakpoint hw_brk[HBP_NUM_MAX]; /* hardware breakpoint info */ > unsigned long trap_nr; /* last trap # on this thread */ > u8 load_slb; /* Ages out SLB preload cache entries */ > u8 load_fp; > diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c > index e0275fcd0c55..f5b4f21e822b 100644 > --- a/arch/powerpc/kernel/process.c > +++ b/arch/powerpc/kernel/process.c > @@ -704,21 +704,50 @@ void switch_booke_debug_regs(struct debug_reg *new_debug) > EXPORT_SYMBOL_GPL(switch_booke_debug_regs); > #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ > #ifndef CONFIG_HAVE_HW_BREAKPOINT > -static void set_breakpoint(struct arch_hw_breakpoint *brk) > +static void set_breakpoint(struct arch_hw_breakpoint *brk, int i) > { > preempt_disable(); > - __set_breakpoint(brk, 0); > + __set_breakpoint(brk, i); > preempt_enable(); > } > > static void set_debug_reg_defaults(struct thread_struct *thread) > { > - thread->hw_brk.address = 0; > - thread->hw_brk.type = 0; > - thread->hw_brk.len = 0; > - thread->hw_brk.hw_len = 0; > - if (ppc_breakpoint_available()) > - set_breakpoint(&thread->hw_brk); > + int i; > + > + for (i = 0; i < nr_wp_slots(); i++) { Maybe you could add the following that you added other places: struct arch_hw_breakpoint null_brk = {0}; Then do thread->hw_brk[i] = null_brk; > + thread->hw_brk[i].address = 0; > + thread->hw_brk[i].type = 0; > + thread->hw_brk[i].len = 0; > + thread->hw_brk[i].hw_len = 0; > + if (ppc_breakpoint_available()) > + set_breakpoint(&thread->hw_brk[i], i); > + } > +} > + > +static inline bool hw_brk_match(struct arch_hw_breakpoint *a, > + struct arch_hw_breakpoint *b) > +{ > + if (a->address != b->address) > + return false; > + if (a->type != b->type) > + return false; > + if (a->len != b->len) > + return false; > + /* no need to check hw_len. it's calculated from address and len */ > + return true; > +} > + > +static void switch_hw_breakpoint(struct task_struct *new) > +{ > + int i; > + > + for (i = 0; i < nr_wp_slots(); i++) { > + if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk[i]), > + &new->thread.hw_brk[i]))) { > + __set_breakpoint(&new->thread.hw_brk[i], i); > + } Or could be: if (likely(hw_brk_match(this_cpu_ptr(¤t_brk[i]), &new->thread.hw_brk[i]))) continue; __set_breakpoint(&new->thread.hw_brk[i], i); > + } > } > #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ > #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ > @@ -822,19 +851,6 @@ bool ppc_breakpoint_available(void) > } > EXPORT_SYMBOL_GPL(ppc_breakpoint_available); > > -static inline bool hw_brk_match(struct arch_hw_breakpoint *a, > - struct arch_hw_breakpoint *b) > -{ > - if (a->address != b->address) > - return false; > - if (a->type != b->type) > - return false; > - if (a->len != b->len) > - return false; > - /* no need to check hw_len. it's calculated from address and len */ > - return true; > -} > - > #ifdef CONFIG_PPC_TRANSACTIONAL_MEM > > static inline bool tm_enabled(struct task_struct *tsk) > @@ -1167,8 +1183,7 @@ struct task_struct *__switch_to(struct task_struct *prev, > * schedule DABR > */ > #ifndef CONFIG_HAVE_HW_BREAKPOINT > - if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk[0]), &new->thread.hw_brk))) > - __set_breakpoint(&new->thread.hw_brk, 0); > + switch_hw_breakpoint(new); > #endif /* CONFIG_HAVE_HW_BREAKPOINT */ > #endif > > diff --git a/arch/powerpc/kernel/ptrace/ptrace-noadv.c b/arch/powerpc/kernel/ptrace/ptrace-noadv.c > index 12962302d6a4..0dbb35392dd2 100644 > --- a/arch/powerpc/kernel/ptrace/ptrace-noadv.c > +++ b/arch/powerpc/kernel/ptrace/ptrace-noadv.c > @@ -67,11 +67,16 @@ int ptrace_get_debugreg(struct task_struct *child, unsigned long addr, > /* We only support one DABR and no IABRS at the moment */ > if (addr > 0) > return -EINVAL; > - dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) | > - (child->thread.hw_brk.type & HW_BRK_TYPE_DABR)); > + dabr_fake = ((child->thread.hw_brk[0].address & (~HW_BRK_TYPE_DABR)) | > + (child->thread.hw_brk[0].type & HW_BRK_TYPE_DABR)); > return put_user(dabr_fake, datalp); > } > > +/* > + * ptrace_set_debugreg() fakes DABR and DABR is only one. So even if > + * internal hw supports more than one watchpoint, we support only one > + * watchpoint with this interface. > + */ > int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, unsigned long data) > { > #ifdef CONFIG_HAVE_HW_BREAKPOINT > @@ -137,7 +142,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, unsigned l > return ret; > > thread->ptrace_bps[0] = bp; > - thread->hw_brk = hw_brk; > + thread->hw_brk[0] = hw_brk; > return 0; > } > > @@ -159,12 +164,24 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, unsigned l > if (set_bp && (!ppc_breakpoint_available())) > return -ENODEV; > #endif /* CONFIG_HAVE_HW_BREAKPOINT */ > - task->thread.hw_brk = hw_brk; > + task->thread.hw_brk[0] = hw_brk; > return 0; > } > > +static int find_empty_hw_brk(struct thread_struct *thread) > +{ > + int i; > + > + for (i = 0; i < nr_wp_slots(); i++) { > + if (!thread->hw_brk[i].address) > + return i; > + } > + return -1; > +} > + > long ppc_set_hwdebug(struct task_struct *child, struct ppc_hw_breakpoint *bp_info) > { > + int i; > #ifdef CONFIG_HAVE_HW_BREAKPOINT > int len = 0; > struct thread_struct *thread = &child->thread; > @@ -223,15 +240,16 @@ long ppc_set_hwdebug(struct task_struct *child, struct ppc_hw_breakpoint *bp_inf > if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) > return -EINVAL; > > - if (child->thread.hw_brk.address) > + i = find_empty_hw_brk(&child->thread); > + if (i < 0) > return -ENOSPC; > > if (!ppc_breakpoint_available()) > return -ENODEV; > > - child->thread.hw_brk = brk; > + child->thread.hw_brk[i] = brk; > > - return 1; > + return i + 1; > } > > long ppc_del_hwdebug(struct task_struct *child, long data) > @@ -241,7 +259,7 @@ long ppc_del_hwdebug(struct task_struct *child, long data) > struct thread_struct *thread = &child->thread; > struct perf_event *bp; > #endif /* CONFIG_HAVE_HW_BREAKPOINT */ > - if (data != 1) > + if (data < 1 || data > nr_wp_slots()) > return -EINVAL; > > #ifdef CONFIG_HAVE_HW_BREAKPOINT > @@ -254,11 +272,11 @@ long ppc_del_hwdebug(struct task_struct *child, long data) > } > return ret; > #else /* CONFIG_HAVE_HW_BREAKPOINT */ > - if (child->thread.hw_brk.address == 0) > + if (child->thread.hw_brk[data - 1].address == 0) > return -ENOENT; > > - child->thread.hw_brk.address = 0; > - child->thread.hw_brk.type = 0; > + child->thread.hw_brk[data - 1].address = 0; > + child->thread.hw_brk[data - 1].type = 0; > #endif /* CONFIG_HAVE_HW_BREAKPOINT */ > > return 0; > diff --git a/arch/powerpc/kernel/ptrace/ptrace32.c b/arch/powerpc/kernel/ptrace/ptrace32.c > index 7976ddf29c0e..7589a9665ffb 100644 > --- a/arch/powerpc/kernel/ptrace/ptrace32.c > +++ b/arch/powerpc/kernel/ptrace/ptrace32.c > @@ -259,8 +259,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, > ret = put_user(child->thread.debug.dac1, (u32 __user *)data); > #else > dabr_fake = ( > - (child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) | > - (child->thread.hw_brk.type & HW_BRK_TYPE_DABR)); > + (child->thread.hw_brk[0].address & (~HW_BRK_TYPE_DABR)) | > + (child->thread.hw_brk[0].type & HW_BRK_TYPE_DABR)); > ret = put_user(dabr_fake, (u32 __user *)data); > #endif > break; > diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c > index bbf237f072d4..b559b114d03d 100644 > --- a/arch/powerpc/kernel/signal.c > +++ b/arch/powerpc/kernel/signal.c > @@ -107,6 +107,9 @@ static void do_signal(struct task_struct *tsk) > struct ksignal ksig = { .sig = 0 }; > int ret; > int is32 = is_32bit_task(); > +#ifndef CONFIG_PPC_ADV_DEBUG_REGS > + int i; > +#endif > > BUG_ON(tsk != current); > > @@ -128,8 +131,10 @@ static void do_signal(struct task_struct *tsk) > * user space. The DABR will have been cleared if it > * triggered inside the kernel. > */ > - if (tsk->thread.hw_brk.address && tsk->thread.hw_brk.type) > - __set_breakpoint(&tsk->thread.hw_brk, 0); > + for (i = 0; i < nr_wp_slots(); i++) { > + if (tsk->thread.hw_brk[i].address && tsk->thread.hw_brk[i].type) > + __set_breakpoint(&tsk->thread.hw_brk[i], i); > + } thread.hwbrk also exists when CONFIG_PPC_ADV_DEBUG_REGS is selected. You could replace the #ifndef CONFIG_PPC_ADV_DEBUG_REGS by an if (!IS_ENABLED(CONFIG_PPC_ADV_DEBUG_REGS)) and then no need of an ifdef when declaring the int i; > #endif > /* Re-enable the breakpoints for the signal stack */ > thread_change_pc(tsk, tsk->thread.regs); > Christophe