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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id g3sm1793431wrm.66.2020.04.01.00.37.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Apr 2020 00:37:33 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/2] ARM: dts: rockchip: add #phy-cells to all usb2-phy nodes Date: Wed, 1 Apr 2020 09:37:24 +0200 Message-Id: <20200401073725.6063-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Current dts files for Rockchip with 'usb2-phy' subnodes are manually verified. In order to automate this process phy-rockchip-inno-usb2.txt has been converted to yaml. 'usb2-phy' nodes are now checked by: 'phy-rockchip-inno-usb2.yaml' and 'phy-provider.yaml'. '#phy-cells' is now required for all usb2-phy nodes, so add them. make -k ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/ phy/phy-rockchip-inno-usb2.yaml Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk322x.dtsi | 2 ++ arch/arm/boot/dts/rv1108.dtsi | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 06172ebbf..9ad32651a 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -214,6 +214,7 @@ clock-names = "phyclk"; clock-output-names = "usb480m_phy0"; #clock-cells = <0>; + #phy-cells = <0>; status = "disabled"; u2phy0_otg: otg-port { @@ -241,6 +242,7 @@ clock-names = "phyclk"; clock-output-names = "usb480m_phy1"; #clock-cells = <0>; + #phy-cells = <0>; status = "disabled"; u2phy1_otg: otg-port { diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index f9cfe2c80..b453f8d0f 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -269,9 +269,10 @@ reg = <0x100 0x0c>; clocks = <&cru SCLK_USBPHY>; clock-names = "phyclk"; - #clock-cells = <0>; clock-output-names = "usbphy"; rockchip,usbgrf = <&usbgrf>; + #clock-cells = <0>; + #phy-cells = <0>; status = "disabled"; u2phy_otg: otg-port { -- 2.11.0