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Subject: Re: [PATCH 5/5] drm/sun4i: tcon: Support LVDS output on Allwinner A20
To:     Maxime Ripard <maxime@cerno.tech>,
        Andrey Lebedev <andrey.lebedev@gmail.com>
Cc:     wens@csie.org, airlied@linux.ie, daniel@ffwll.ch,
        dri-devel@lists.freedesktop.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-sunxi@googlegroups.com
References: <20200210195633.GA21832@kedthinkpad>
 <20200219180858.4806-1-andrey.lebedev@gmail.com>
 <20200219180858.4806-6-andrey.lebedev@gmail.com>
 <20200220172512.dmjtqgyay73x3ubx@gilmour.lan>
From:   Andrey Lebedev <andrey@lebedev.lt>
Message-ID: <fa780b70-f1cc-ee4c-e779-089c7e9159ab@lebedev.lt>
Date:   Wed, 1 Apr 2020 13:59:27 +0300
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Hello Maxime,

Since Linus' merge window is now open, do I have to do anything to get 
this merged into the mainline kernel?

On 2/20/20 7:25 PM, Maxime Ripard wrote:
> On Wed, Feb 19, 2020 at 08:08:58PM +0200, Andrey Lebedev wrote:
>> From: Andrey Lebedev <andrey@lebedev.lt>
>>
>> A20 SoC (found in Cubieboard 2 among others) requires different LVDS set
>> up procedure than A33. Timing controller (tcon) driver only implements
>> sun6i-style procedure, that doesn't work on A20 (sun7i).
>>
>> Signed-off-by: Andrey Lebedev <andrey@lebedev.lt>
>> ---
>>   drivers/gpu/drm/sun4i/sun4i_tcon.c | 37 +++++++++++++++++++++++++++++-
>>   drivers/gpu/drm/sun4i/sun4i_tcon.h | 11 +++++++++
>>   2 files changed, 47 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> index b7234eef3c7b..09ee6e8c6914 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> @@ -114,6 +114,30 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
>>   	}
>>   }
>>
>> +static void sun4i_tcon_setup_lvds_phy(struct sun4i_tcon *tcon,
>> +				      const struct drm_encoder *encoder)
>> +{
>> +	regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
>> +		     SUN4I_TCON0_LVDS_ANA0_CK_EN |
>> +		     SUN4I_TCON0_LVDS_ANA0_REG_V |
>> +		     SUN4I_TCON0_LVDS_ANA0_REG_C |
>> +		     SUN4I_TCON0_LVDS_ANA0_EN_MB |
>> +		     SUN4I_TCON0_LVDS_ANA0_PD |
>> +		     SUN4I_TCON0_LVDS_ANA0_DCHS);
>> +
>> +	udelay(2); /* delay at least 1200 ns */
>> +	regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA1_REG,
>> +			   SUN4I_TCON0_LVDS_ANA1_INIT,
>> +			   SUN4I_TCON0_LVDS_ANA1_INIT);
>> +	udelay(1); /* delay at least 120 ns */
>> +	regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA1_REG,
>> +			   SUN4I_TCON0_LVDS_ANA1_UPDATE,
>> +			   SUN4I_TCON0_LVDS_ANA1_UPDATE);
>> +	regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
>> +			   SUN4I_TCON0_LVDS_ANA0_EN_MB,
>> +			   SUN4I_TCON0_LVDS_ANA0_EN_MB);
>> +}
>> +
>>   static void sun6i_tcon_setup_lvds_phy(struct sun4i_tcon *tcon,
>>   				      const struct drm_encoder *encoder)
>>   {
>> @@ -1455,7 +1479,18 @@ static const struct sun4i_tcon_quirks sun6i_a31s_quirks = {
>>   	.dclk_min_div		= 1,
>>   };
>>
>> +static const struct sun4i_tcon_quirks sun7i_a20_tcon0_quirks = {
>> +	.supports_lvds		= true,
>> +	.has_channel_0		= true,
>> +	.has_channel_1		= true,
>> +	.dclk_min_div		= 4,
>> +	/* Same display pipeline structure as A10 */
>> +	.set_mux		= sun4i_a10_tcon_set_mux,
>> +	.setup_lvds_phy		= sun4i_tcon_setup_lvds_phy,
>> +};
>> +
>>   static const struct sun4i_tcon_quirks sun7i_a20_quirks = {
>> +	.supports_lvds		= false,
> 
> False is already the default here.
> 
> I've removed it while applying
> 
> Maxime
> 

-- 
Andrey Lebedev aka -.- . -.. -.. . .-.
Software engineer
Homepage: http://lebedev.lt/