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[80.183.220.3]) by smtp.gmail.com with ESMTPSA id w66sm2504621wma.38.2020.04.01.05.09.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Apr 2020 05:09:55 -0700 (PDT) From: To: "'Rob Herring'" Cc: "'Stanimir Varbanov'" , "'Andy Gross'" , "'Bjorn Andersson'" , "'Bjorn Helgaas'" , "'Mark Rutland'" , "'Lorenzo Pieralisi'" , "'Andrew Murray'" , "'Philipp Zabel'" , , , , References: <20200320183455.21311-1-ansuelsmth@gmail.com> <20200320183455.21311-8-ansuelsmth@gmail.com> <20200331173241.GA25681@bogus> In-Reply-To: <20200331173241.GA25681@bogus> Subject: R: [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie Date: Wed, 1 Apr 2020 14:09:54 +0200 Message-ID: <013b01d6081e$74e3b710$5eab2530$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Content-Language: it Thread-Index: AQF7DJ39byRpk4MoIUXZtcQDafvd5gI+20GLAtWBGGmo8YCbwA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Messaggio originale----- > Da: Rob Herring > Inviato: marted=EC 31 marzo 2020 19:33 > A: Ansuel Smith > Cc: Stanimir Varbanov ; Andy Gross > ; Bjorn Andersson ; > Bjorn Helgaas ; Mark Rutland > ; Lorenzo Pieralisi ; > Andrew Murray ; Philipp Zabel > ; linux-arm-msm@vger.kernel.org; linux- > pci@vger.kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org > Oggetto: Re: [PATCH 08/12] devicetree: bindings: pci: add = phy-tx0-term- > offset to qcom,pcie >=20 > On Fri, Mar 20, 2020 at 07:34:50PM +0100, Ansuel Smith wrote: > > Document phy-tx0-term-offset propriety to qcom pcie driver >=20 > propriety? >=20 > > > > Signed-off-by: Ansuel Smith > > --- > > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > > index 6efcef040741..8c1d014f37b0 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > > @@ -254,6 +254,12 @@ > > - "perst-gpios" PCIe endpoint reset signal line > > - "wake-gpios" PCIe endpoint wake signal line > > > > +- phy-tx0-term-offset: >=20 > Needs a vendor prefix. >=20 So I should change to qcom,phy-tx0-term-offset right? > > + Usage: optional > > + Value type: > > + Definition: If not defined is 0. In ipq806x is set to 7. In newer > > + revision (v2.0) the offset is zero. > > + > > * Example for ipq/apq8064 > > pcie@1b500000 { > > compatible =3D "qcom,pcie-apq8064", "qcom,pcie-ipq8064", > "snps,dw-pcie"; > > @@ -293,6 +299,7 @@ > > reset-names =3D "axi", "ahb", "por", "pci", "phy", "ext"; > > pinctrl-0 =3D <&pcie_pins_default>; > > pinctrl-names =3D "default"; > > + phy-tx0-term-offset =3D <7>; > > }; > > > > * Example for apq8084 > > -- > > 2.25.1 > >