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[209.85.208.182]) by smtp.gmail.com with ESMTPSA id m8sm2070608lji.12.2020.04.01.16.51.54 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Apr 2020 16:51:54 -0700 (PDT) Received: by mail-lj1-f182.google.com with SMTP id 19so1316159ljj.7 for ; Wed, 01 Apr 2020 16:51:54 -0700 (PDT) X-Received: by 2002:a2e:8652:: with SMTP id i18mr373016ljj.265.1585785113845; Wed, 01 Apr 2020 16:51:53 -0700 (PDT) MIME-Version: 1.0 References: <20200324215049.GA3710@pi3.com.pl> <202003291528.730A329@keescook> <87zhbvlyq7.fsf_-_@x220.int.ebiederm.org> In-Reply-To: From: Linus Torvalds Date: Wed, 1 Apr 2020 16:51:38 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] signal: Extend exec_id to 64bits To: Jann Horn Cc: "Eric W. Biederman" , Alan Stern , Andrea Parri , Will Deacon , Peter Zijlstra , Boqun Feng , Nicholas Piggin , David Howells , Jade Alglave , Luc Maranget , "Paul E. McKenney" , Akira Yokosawa , Daniel Lustig , Adam Zabrocki , kernel list , Kernel Hardening , Oleg Nesterov , Andy Lutomirski , Bernd Edlinger , Kees Cook , Andrew Morton , stable Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 1, 2020 at 4:37 PM Jann Horn wrote: > > GCC will generate code for this without complaining, but I think it'll > probably generate a tearing store on 32-bit platforms: This is very much a "we don't care" case. It's literally testing a sequence counter for equality. If you get tearing in the high bits on the write (or the read), you'd still need to have the low bits turn around 4G times to get a matching value. So no. We're not doing atomics for the 32-bit case. That's insane. Linus