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Reply-To: like.xu@intel.com
Subject: Re: [PATCH v9 00/10] Guest Last Branch Recording Enabling
From:   "Xu, Like" <like.xu@intel.com>
To:     Peter Zijlstra <peterz@infradead.org>
Cc:     kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
        Paolo Bonzini <pbonzini@redhat.com>
References: <20200313021616.112322-1-like.xu@linux.intel.com>
 <446eef98-4d9f-4a9b-bdae-d29e36f6e07e@intel.com>
Organization: Intel OTC
Message-ID: <22fdfc2d-51f9-9a53-e8b9-6c5c1bdf2536@intel.com>
Date:   Thu, 2 Apr 2020 20:59:24 +0800
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Hi Peter,

I'm not sure if you recently had a time to review the proposed change
on the host perf subsystem, which was introduced to support guest LBR 
enablement.

The number of potential LBR users on the guest is growing and
I have been looking forward to your comments on the patch 0001-0004 in this 
version,
even if it is completely negative.

Thanks,
Like Xu

On 2020/3/20 16:45, Xu, Like wrote:
> Hi Peter,
> any comments on the host perf changes?
>
> Hi Paolo,
> any comments on the kvm changes? Isn't this feature interesting to you?
>
> Just kindly ping.
>
> Thanks,
> Like Xu
>
> On 2020/3/13 10:16, Like Xu wrote:
>> Hi all,
>>
>> Please help review your interesting parts in this stable version,
>> e.g. the first four patches involve the perf event subsystem
>> and the fifth patch concerns the KVM userspace interface.
>
>> v8->v9 Changelog:
>> - using guest_lbr_constraint to create guest LBR event without hw counter;
>>    (please check perf changes in patch 0003)
>> - rename 'cpuc->vcpu_lbr' to 'cpuc->guest_lbr_enabled';
>>    (please check host LBR changes in patch 0004)
>> - replace 'pmu->lbr_used' mechanism with lazy release 
>> kvm_pmu_lbr_cleanup();
>> - refactor IA32_PERF_CAPABILITIES trap via get_perf_capabilities();
>> - refactor kvm_pmu_lbr_enable() with kvm_pmu_lbr_setup();
>> - simplify model-specific LBR functionality check;
>> - rename x86_perf_get_lbr_stack to x86_perf_get_lbr;
>> - rename intel_pmu_lbr_confirm() to kvm_pmu_availability_check();
>>
>> Previous:
>> https://lore.kernel.org/lkml/1565075774-26671-1-git-send-email-wei.w.wang@intel.com/ 
>>
>>
>> Like Xu (7):
>>    perf/x86/lbr: Add interface to get basic information about LBR stack
>>    perf/x86: Add constraint to create guest LBR event without hw counter
>>    perf/x86: Keep LBR stack unchanged on the host for guest LBR event
>>    KVM: x86: Add KVM_CAP_X86_GUEST_LBR interface to dis/enable LBR
>>      feature
>>    KVM: x86/pmu: Add LBR feature emulation via guest LBR event
>>    KVM: x86/pmu: Release guest LBR event via vPMU lazy release mechanism
>>    KVM: x86: Expose MSR_IA32_PERF_CAPABILITIES to guest for LBR record
>>      format
>>
>> Wei Wang (3):
>>    perf/x86: Fix msr variable type for the LBR msrs
>>    KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in
>>    KVM: x86: Remove the common trap handler of the MSR_IA32_DEBUGCTLMSR
>>
>>   Documentation/virt/kvm/api.rst    |  28 +++
>>   arch/x86/events/core.c            |   9 +-
>>   arch/x86/events/intel/core.c      |  29 +++
>>   arch/x86/events/intel/lbr.c       |  55 +++++-
>>   arch/x86/events/perf_event.h      |  21 ++-
>>   arch/x86/include/asm/kvm_host.h   |   7 +
>>   arch/x86/include/asm/perf_event.h |  24 ++-
>>   arch/x86/kvm/cpuid.c              |   3 +-
>>   arch/x86/kvm/pmu.c                |  28 ++-
>>   arch/x86/kvm/pmu.h                |  26 ++-
>>   arch/x86/kvm/pmu_amd.c            |   7 +-
>>   arch/x86/kvm/vmx/pmu_intel.c      | 291 ++++++++++++++++++++++++++++--
>>   arch/x86/kvm/vmx/vmx.c            |   4 +-
>>   arch/x86/kvm/vmx/vmx.h            |   2 +
>>   arch/x86/kvm/x86.c                |  42 +++--
>>   include/linux/perf_event.h        |   7 +
>>   include/uapi/linux/kvm.h          |   1 +
>>   kernel/events/core.c              |   7 -
>>   tools/include/uapi/linux/kvm.h    |   1 +
>>   19 files changed, 540 insertions(+), 52 deletions(-)
>>
>