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([2804:431:e7cc:11ff:4f80:3de:e2b2:5c1d]) by smtp.gmail.com with ESMTPSA id l7sm3630805qkb.47.2020.04.02.07.43.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 02 Apr 2020 07:43:14 -0700 (PDT) Subject: Re: [PATCH 3/4] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 To: =?UTF-8?Q?Heiko_St=c3=bcbner?= , Johan Jonker Cc: helen.koike@collabora.com, dafna.hirschfeld@collabora.com, devel@driverdev.osuosl.org, devicetree@vger.kernel.org, ezequiel@collabora.com, hverkuil-cisco@xs4all.nl, karthik.poduval@gmail.com, kernel@collabora.com, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, mark.rutland@arm.com, robh+dt@kernel.org References: <20200402000234.226466-4-helen.koike@collabora.com> <970b9e48-e38f-7e7a-3472-7dc5a4737e58@gmail.com> <105956984.FXDh2DO4ZE@diego> From: Helen Koike Message-ID: <2fa1b497-509a-d02f-b893-058639655133@koikeco.de> Date: Thu, 2 Apr 2020 11:43:08 -0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <105956984.FXDh2DO4ZE@diego> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 4/2/20 11:31 AM, Heiko Stübner wrote: > Am Donnerstag, 2. April 2020, 15:48:02 CEST schrieb Johan Jonker: >> Hi Helen, >> >>> From: Helen Koike >> >>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> index 33cc21fcf4c10..fc0295d2a65a1 100644 >>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> @@ -1394,6 +1394,17 @@ io_domains: io-domains { >>> status = "disabled"; >>> }; >>> >> >>> + mipi_dphy_rx0: mipi-dphy-rx0 { >> >> For Heiko sort syscon@ff770000 subnodes alphabetical or reg value first? > > Similar to main nodes ... so things without reg alphabetical, > the rest by reg address > > >> >>> + compatible = "rockchip,rk3399-mipi-dphy-rx0"; >>> + clocks = <&cru SCLK_MIPIDPHY_REF>, >> >>> + <&cru SCLK_DPHY_RX0_CFG>, >>> + <&cru PCLK_VIO_GRF>; >> >> Align ^ ack. Thanks Helen >> >>> + clock-names = "dphy-ref", "dphy-cfg", "grf"; >>> + power-domains = <&power RK3399_PD_VIO>; >>> + #phy-cells = <0>; >>> + status = "disabled"; >>> + }; >>> + >>> u2phy0: usb2-phy@e450 { >>> compatible = "rockchip,rk3399-usb2phy"; >>> reg = <0xe450 0x10>; >> >> > > > >