Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp1911032ybb; Thu, 2 Apr 2020 09:32:42 -0700 (PDT) X-Google-Smtp-Source: APiQypLIWJkM8kYD8J+biPQ92JFgrT1MLiueAo7miRm2GOjDUq9CbVcSQ1NV5CePC484dH/Lh1CE X-Received: by 2002:a9d:128:: with SMTP id 37mr3008468otu.270.1585845162316; Thu, 02 Apr 2020 09:32:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1585845162; cv=none; d=google.com; s=arc-20160816; b=U7zgAuwwUFSDrLr3kajwEjNbQUmcYda5bSLDVGxhFEktUJi84GpdewJA69kcHpVYhS 7FcebwMiU/iXg8SH0kJOvVYKa44qOOubgLsqVAzbqcyj/3EgZdGlo9REyVR9GMEOn/41 YuxYcMdYLKvUVvSJdR/7rpUV+anDihU+4awK7NLUpyBKmnHjfLZAM4K35UdINVRX/ONX FPMlAEXh4QOHunDlVFf5WhaDtiea0ZEHyAxFXJx0QSgu1Dvyk7/MO5C802pCjndTc6Rf SOB9/a+x5XrPL/AHY9sRnk9BCd+loVtDxaH+YbBRdNxpn31ZNOZ4okL1HCIeqf1zG4yw tXYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:ironport-sdr:ironport-sdr; bh=EZvdEpAEDLrNOXb7X5qDzVn5fMupgCLZOsf6vnYLNdo=; b=te1mWuxPs73VZPCJ/wpmeHZqequUbKveDr7NTDjiP5iaUjH/uBxPe5cDSVvKtB0HBx alxdOsNqZvqQmX6PejxNArKsauwxu9i8wDbPga76qBQWlYoebIVBw7nSpJP7w57ITCZM Ue6iEhZyR97nngD398Nt9o0tJuK5GFl6RwdXoRH2yMwkypXHczpRaIRa3xR2ztASt1cm nrlZ2zlTRpZB/nVuO1et5mZ/8XMdhheLsxDmwGXeUK65bIkW58gu16exsDqfBKPG2FeT 4iSqa/zeoXSPIVlXt4CIsetRzdpZPDmBfz3CNqQjLpmhYN1zFBzDh1z/kKlwn3OK9ktK 4+Qw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e11si2449621oib.152.2020.04.02.09.32.29; Thu, 02 Apr 2020 09:32:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388779AbgDBOuA (ORCPT + 99 others); Thu, 2 Apr 2020 10:50:00 -0400 Received: from mga07.intel.com ([134.134.136.100]:28435 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388744AbgDBOt7 (ORCPT ); Thu, 2 Apr 2020 10:49:59 -0400 IronPort-SDR: B6l/dl9Qie3QC7aOdRXRbgqnlMJu2KKF27YeG6wVlnp+i1WW1kgJ1QCTJ/gKS9WJ+MkA5P81/x oQZweWB00FTA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2020 07:49:59 -0700 IronPort-SDR: 0BtyTpmg/V5Oaxb49U21GEN9wVBtJFtDv3OO9RAhsaTN6zt65Ek1++As1/xNDTx5TKKpHW6hO+ 5LZYxdeThZTg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,336,1580803200"; d="scan'208";a="295672102" Received: from enordin-mobl.gar.corp.intel.com (HELO E6440.gar.corp.intel.com) ([10.255.190.145]) by FMSMGA003.fm.intel.com with ESMTP; 02 Apr 2020 07:49:54 -0700 From: Harry Pan To: LKML Cc: gs0622@gmail.com, Harry Pan , Alexander Shishkin , Arnaldo Carvalho de Melo , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jiri Olsa , Mark Rutland , Namhyung Kim , Peter Zijlstra , Thomas Gleixner , x86@kernel.org Subject: [PATCH] perf/x86/cstate: Add Jasper Lake CPU support Date: Thu, 2 Apr 2020 22:49:49 +0800 Message-Id: <20200402224947.1.Ic02e891daac41303aed1f2fc6c64f6110edd27bd@changeid> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jasper Lake processor is Tremont microarchitecture, we can reuse the glm_cstates table of Goldmont and Goldmont Plus to enable the C-states residency profiling. Signed-off-by: Harry Pan --- arch/x86/events/intel/cstate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c index e4aa20c0426f..442e1ed4acd4 100644 --- a/arch/x86/events/intel/cstate.c +++ b/arch/x86/events/intel/cstate.c @@ -643,6 +643,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates), X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates), X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates), + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates), X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates), X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates), -- 2.24.1