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From:   "Hyunki Koo" <hyunki00.koo@samsung.com>
To:     "'Krzysztof Kozlowski'" <krzk@kernel.org>
Cc:     <gregkh@linuxfoundation.org>, "'Kukjin Kim'" <kgene@kernel.org>,
        "'Jiri Slaby'" <jslaby@suse.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-samsung-soc@vger.kernel.org>,
        <linux-serial@vger.kernel.org>, <linux-kernel@vger.kernel.org>
In-Reply-To: <20200403075122.GA9358@kozik-lap>
Subject: RE: [PATCH v2] tty: samsung_tty: 32-bit access for TX/RX hold
 registers
Date:   Fri, 3 Apr 2020 19:19:30 +0900
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References: <20200401082721.19431-1-hyunki00.koo@samsung.com>
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On Thu, Apr 02, 2020 at 4:51:29PM +0900, Krzysztof Kozlowski
> On Fri, Apr 03, 2020 at 04:30:38PM +0900, Hyunki Koo wrote:
> > On Thu, Apr 02, 2020 at 10:59:29PM +0900, Krzysztof Kozlowski
> > > On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote:
> > > > Support 32-bit access for the TX/RX hold registers UTXH and URXH.
> > > >
> > > > This is required for some newer SoCs.
> > > >
> > > > Signed-off-by: Hyunki Koo <hyunki00.koo=40samsung.com>
> > > > ---
> > > >  drivers/tty/serial/samsung_tty.c =7C 78
> > > > +++++++++++++++++++++++++++++++++-------
> > > >  1 file changed, 66 insertions(+), 12 deletions(-)
> > > >
> > > > diff --git a/drivers/tty/serial/samsung_tty.c
> > > > b/drivers/tty/serial/samsung_tty.c
> > > > index 73f951d65b93..826d8c5846a6 100644
> > > > --- a/drivers/tty/serial/samsung_tty.c
> > > > +++ b/drivers/tty/serial/samsung_tty.c
> > > > =40=40 -154,12 +154,47 =40=40 struct s3c24xx_uart_port =7B  =23defi=
ne
> > > > portaddrl(port, reg) =5C
> > > >  	((unsigned long *)(unsigned long)((port)->membase + (reg)))
> > > >
> > > > -=23define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg)))
> > > > +static unsigned int rd_reg(struct uart_port *port, int reg) =7B
> > > > +	switch (port->iotype) =7B
> > > > +	case UPIO_MEM:
> > > > +		return readb_relaxed(portaddr(port, reg));
> > > > +	case UPIO_MEM32:
> > > > +		return readl_relaxed(portaddr(port, reg));
> > > > +	default:
> > > > +		return 0;
> > > > +	=7D
> > > > +	return 0;
> > > > +=7D
> > > > +
> > > >  =23define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
> > > >
> > > > -=23define wr_regb(port, reg, val) writeb_relaxed(val,
> > > > portaddr(port,
> > > > reg))
> > > > +static void wr_reg(struct uart_port *port, int reg, int val) =7B
> > > > +	switch (port->iotype) =7B
> > > > +	case UPIO_MEM:
> > > > +		writeb_relaxed(val, portaddr(port, reg));
> > > > +		break;
> > > > +	case UPIO_MEM32:
> > > > +		writel_relaxed(val, portaddr(port, reg));
> > > > +		break;
> > > > +	=7D
> > > > +=7D
> > > > +
> > > >  =23define wr_regl(port, reg, val) writel_relaxed(val,
> > > > portaddr(port,
> > > > reg))
> > > >
> > > > +static void write_buf(struct uart_port *port, int reg, int val) =
=7B
> > > > +	switch (port->iotype) =7B
> > > > +	case UPIO_MEM:
> > > > +		writeb(val, portaddr(port, reg));
> > > > +		break;
> > > > +	case UPIO_MEM32:
> > > > +		writel(val, portaddr(port, reg));
> > > > +		break;
> > > > +	=7D
> > > > +=7D
> > > > +
> > > >  /* Byte-order aware bit setting/clearing functions. */
> > > >
> > > >  static inline void s3c24xx_set_bit(struct uart_port *port, int
> > > > idx, =40=40 -714,7 +749,7 =40=40 static void
> > > > s3c24xx_serial_rx_drain_fifo(struct
> > > s3c24xx_uart_port *ourport)
> > > >  		fifocnt--;
> > > >
> > > >  		uerstat =3D rd_regl(port, S3C2410_UERSTAT);
> > > > -		ch =3D rd_regb(port, S3C2410_URXH);
> > > > +		ch =3D rd_reg(port, S3C2410_URXH);
> > > >
> > > >  		if (port->flags & UPF_CONS_FLOW) =7B
> > > >  			int txe =3D s3c24xx_serial_txempty_nofifo(port);
> > > > =40=40 -826,7 +861,7 =40=40 static irqreturn_t
> s3c24xx_serial_tx_chars(int
> > > irq, void *id)
> > > >  	=7D
> > > >
> > > >  	if (port->x_char) =7B
> > > > -		wr_regb(port, S3C2410_UTXH, port->x_char);
> > > > +		wr_reg(port, S3C2410_UTXH, port->x_char);
> > > >  		port->icount.tx++;
> > > >  		port->x_char =3D 0;
> > > >  		goto out;
> > > > =40=40 -852,7 +887,7 =40=40 static irqreturn_t
> s3c24xx_serial_tx_chars(int
> > > irq, void *id)
> > > >  		if (rd_regl(port, S3C2410_UFSTAT) & ourport->info-
> > > >tx_fifofull)
> > > >  			break;
> > > >
> > > > -		wr_regb(port, S3C2410_UTXH, xmit->buf=5Bxmit->tail=5D);
> > > > +		wr_reg(port, S3C2410_UTXH, xmit->buf=5Bxmit->tail=5D);
> > > >  		xmit->tail =3D (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> > > >  		port->icount.tx++;
> > > >  		count--;
> > > > =40=40 -916,7 +951,7 =40=40 static unsigned int
> > > s3c24xx_serial_tx_empty(struct
> > > > uart_port *port)
> > > >  /* no modem control lines */
> > > >  static unsigned int s3c24xx_serial_get_mctrl(struct uart_port
> > > > *port) =7B
> > > > -	unsigned int umstat =3D rd_regb(port, S3C2410_UMSTAT);
> > > > +	unsigned int umstat =3D rd_reg(port, S3C2410_UMSTAT);
> > > >
> > > >  	if (umstat & S3C2410_UMSTAT_CTS)
> > > >  		return TIOCM_CAR =7C TIOCM_DSR =7C TIOCM_CTS; =40=40 -
> > > 1974,7 +2009,7 =40=40
> > > > static int s3c24xx_serial_probe(struct platform_device *pdev)
> > > >  	struct device_node *np =3D pdev->dev.of_node;
> > > >  	struct s3c24xx_uart_port *ourport;
> > > >  	int index =3D probe_index;
> > > > -	int ret;
> > > > +	int ret, prop =3D 0;
> > > >
> > > >  	if (np) =7B
> > > >  		ret =3D of_alias_get_id(np, =22serial=22); =40=40 -2000,10
> > > +2035,29 =40=40 static
> > > > int s3c24xx_serial_probe(struct platform_device *pdev)
> > > >  			dev_get_platdata(&pdev->dev) :
> > > >  			ourport->drv_data->def_cfg;
> > > >
> > > > -	if (np)
> > > > +	if (np) =7B
> > > >  		of_property_read_u32(np,
> > > >  			=22samsung,uart-fifosize=22, &ourport->port.fifosize);
> > > >
> > > > +		if (of_property_read_u32(np, =22reg-io-width=22, &prop) =3D=3D
> > > 0) =7B
> > > > +			switch (prop) =7B
> > > > +			case 1:
> > > > +				ourport->port.iotype =3D UPIO_MEM;
> > > > +				break;
> > > > +			case 4:
> > > > +				ourport->port.iotype =3D UPIO_MEM32;
> > > > +				break;
> > > > +			default:
> > > > +				dev_warn(&pdev->dev, =22unsupported
> > > reg-io-width (%d)=5Cn=22,
> > > > +						prop);
> > > > +				ret =3D -EINVAL;
> > > > +				break;
> > > > +			=7D
> > > > +		=7D else =7B
> > > > +			ourport->port.iotype =3D UPIO_MEM;
> > > > +		=7D
> > > > +	=7D
> > >
> > > I think this still breaks all non-DT platforms (e.g. s3c).
> > >
> > > Best regards,
> > > Krzysztof
> >
> > Thank you for your comment.
> > I  hope ourport->port.iotype  is initialized by below table for non-DT
> > platforms
>=20
> Indeed, you're right. In this case, this else() you added is not needed.
> The default value for non-DT and existing DT platforms will be the same
> (UPIO_MEM).
>=20
> Best regards,
> Krzysztof

Thank you  for your comment.
I will remove  this line also in v3
+		=7D else =7B
+			ourport->port.iotype =3D UPIO_MEM;