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From:   =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= <peron.clem@gmail.com>
Date:   Sun, 5 Apr 2020 16:33:37 +0200
Message-ID: <CAJiuCcfAKCs5ZLi_O21eyx-ZraC2Sb_ugQSmOEYm5+eVkQ7ZSw@mail.gmail.com>
Subject: Re: [linux-sunxi] [PATCH 0/7] Add support for Allwinner H6 DVFS
To:     =?UTF-8?Q?Ond=C5=99ej_Jirman?= <megous@megous.com>,
        =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= <peron.clem@gmail.com>,
        Maxime Ripard <mripard@kernel.org>,
        Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        devicetree <devicetree@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        linux-sunxi <linux-sunxi@googlegroups.com>
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Hi Ond=C5=99ej,

On Sun, 5 Apr 2020 at 13:51, Ond=C5=99ej Jirman <megous@megous.com> wrote:
>
> Hello Cl=C3=A9ment,
>
> On Sun, Apr 05, 2020 at 12:49:06PM +0200, Cl=C3=A9ment P=C3=A9ron wrote:
> > Hi Sunxi maintainers and members,
> >
> > Now that required drivers are merged we can contibute on DVFS support f=
or
> > Allwinner H6.
> >
> > This serie is based on Yangtao Li serie[0] and Megous works[1].
> >
> > Most of the OPP tables are taken from original vendor kernel[2].
> > Plus there is a new CPU frequency @1.8GHz.
> >
> > I wrote a simple script to randomly set a frequency during a random tim=
e[3].
> > With this script and using stress-ng during a day I didn't see any issu=
e.
> > Moreover I have tested specifically the 1.8GHz on my Beelink GS1, max t=
hermal
> > 80=C2=B0C is reached after ~10min and then the SoC oscillates quickly b=
etween 1.5
> > and 1.8GHz.
>
> Thank you for working on this. :) I wonder what SoC bin you tested this o=
n.
>
> I have a patch to print it here:
>
>   https://megous.com/git/linux/commit/?h=3Dths-5.7&id=3Dc5ddd2a45c7e04dce=
c31619b58de7c798ad6594c
My SoC bin is :
[    0.584553] sun50i_cpufreq_nvmem: Using CPU speed bin speed0
>
> > I also test that that offlining CPU0 and doing DVFS on other CPUs works=
.
> > As CPU regulator is only set for CPU0.
> >
> > But maybe it doesn't cost much to set the regulator for all the CPUs?
> >
> > Jernej test the GPU devfreq on several H6 board particulary the Tanix T=
X6 which
> > doesn't have a proper dedicated PMIC and doesn't had any trouble with i=
t.
> >
> > Do you think I can enable GPU OPP for all H6 Boards?
> >
> > Also Yangtao Li enable DVFS for OrangePi and Pine64, as I can't test th=
em I
> > didn't reenable these boards. Please, let me know if you want me to add=
 these
> > boards in this serie.
>
> Feel free to add these OPPs also to OrangePi 3 dts, I've been running min=
e with
> this OPP table for at least a year already (I have the worst SoC bin).
>
> Though I'll run a bit more comprehensive test for more frequencies, like =
you
> did, just to be sure.
>
> One thing I wonder about is if there should not be some small ramp delay =
on the
> CPU regulator node, because voltage change probably takes some small time=
 to
> apply, compared to changing the PLL frequency. And I have no idea if the =
CPU
> is not running for some very small time out of spec during transitions.
>
> I didn't find timing information in the PMIC datasheet, but I suppose bas=
ed
> on the DCDCA frequency of 3MHz that it will adapt to the new voltage in t=
he
> range of 1s-10s of microseconds.
>
> In datasheet of the similar PMIC (AXP813) there is this note:
>
>   DVM (Dynamic Voltage scaling Management) ramp rate: 2.5mV/us at buck fr=
equency 3MHz

Good point, this information should be added for both CPU and GPU regulator=
.
This could be nice to confirm this point with a scope.

Also I remark that Allwinner user higher temperature than what we set :
alarm_low_temp =3D <105000>;
alarm_high_temp =3D <110000>;
alarm_temp_hysteresis =3D <15000>;
shut_temp=3D <115000>;
https://github.com/orangepi-xunlong/OrangePiH6_Linux4_9/blob/master/arch/ar=
m64/boot/dts/sunxi/sun50iw6p1.dtsi#L1924

Don't you think that we can push a bit higher the temperature it's
actually at 80=C2=B0C ?

Thanks for the review,
Clement

>
> I think it will be simiar with AXP805.
>
> regards,
>         o.
>
> > Thanks,
> > Cl=C3=A9ment
> >
> > 0: https://patchwork.kernel.org/cover/10815117/
> > 1: https://megous.com/git/linux/log/?h=3Dths-5.7
> > 2: https://github.com/orangepi-xunlong/OrangePiH6_Linux4_9/blob/master/=
arch/arm64/boot/dts/sunxi/sun50iw6p1.dtsi#L345-L517
> > 3: https://gist.github.com/clementperon/55a055dae3f13bbd14fb39c0069fe2e=
2
> >
> > Cl=C3=A9ment P=C3=A9ron (4):
> >   arm64: dts: allwinner: h6: set thermal polling time
> >   arm64: dts: allwinner: h6: Add GPU Operating Performance Points table
> >   arm64: configs: Enable sun50i cpufreq nvmem
> >   arm64: dts: allwinner: h6: Enable CPU and GPU opp tables for Beelink
> >     GS1
> >
> > Ondrej Jirman (2):
> >   arm64: dts: allwinner: h6: Add thermal trip points/cooling map
> >   arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
> >
> > Yangtao Li (1):
> >   arm64: dts: allwinner: h6: Add clock to CPU cores
> >
> >  .../dts/allwinner/sun50i-h6-beelink-gs1.dts   |  10 +-
> >  .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 103 ++++++++++++++++++
> >  .../boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi |  74 +++++++++++++
> >  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  |  44 +++++++-
> >  arch/arm64/configs/defconfig                  |   1 +
> >  5 files changed, 226 insertions(+), 6 deletions(-)
> >  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dts=
i
> >  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-gpu-opp.dts=
i
> >
> > --
> > 2.20.1
> >
> > --
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