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[60.241.117.97]) by smtp.gmail.com with ESMTPSA id a3sm10322567pfg.172.2020.04.05.18.26.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Apr 2020 18:26:27 -0700 (PDT) Date: Mon, 06 Apr 2020 11:25:20 +1000 From: Nicholas Piggin Subject: Re: [RFC PATCH v2 12/13] powerpc/kernel: Do not inconditionally save non volatile registers on system call To: Benjamin Herrenschmidt , Christophe Leroy , Michael Ellerman , msuchanek@suse.de, Paul Mackerras Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org References: <029e1064b1ad738785718221ea468c9cfc282457.1586108649.git.christophe.leroy@c-s.fr> <4ef6d617cfd34e09e9bf5a456b2e0b6d2a8a3c96.1586108649.git.christophe.leroy@c-s.fr> In-Reply-To: <4ef6d617cfd34e09e9bf5a456b2e0b6d2a8a3c96.1586108649.git.christophe.leroy@c-s.fr> MIME-Version: 1.0 User-Agent: astroid/0.15.0 (https://github.com/astroidmail/astroid) Message-Id: <1586135554.pnqaj0giue.astroid@bobo.none> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Christophe Leroy's on April 6, 2020 3:44 am: > Before : 347 cycles on null_syscall > After : 327 cycles on null_syscall The problem I had doing this is that signal delivery wnats full regs, and you don't know if you have a signal pending ahead of time if you have interrupts enabled. I began to try bailing out back to asm to save nvgprs and call again. I think that can be made to work, but it is more complication in asm, and I soon found that 64s CPUs don't care about NVGPRs too much so it's nice to get rid of the !fullregs state. Possibly another approach would be to leave interrupts disabled for the case where you have no work to do. You could create a small syscall_exit_prepare_nowork fastpath for that case for 32-bit, perhaps? Thanks, Nick =