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[209.132.180.67]) by mx.google.com with ESMTP id w18si114371otp.73.2020.04.06.10.47.45; Mon, 06 Apr 2020 10:47:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="pGJxT/+1"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727522AbgDFRpj (ORCPT + 99 others); Mon, 6 Apr 2020 13:45:39 -0400 Received: from mail-ed1-f66.google.com ([209.85.208.66]:34882 "EHLO mail-ed1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726713AbgDFRpj (ORCPT ); Mon, 6 Apr 2020 13:45:39 -0400 Received: by mail-ed1-f66.google.com with SMTP id c7so589078edl.2 for ; Mon, 06 Apr 2020 10:45:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7RXoohFvXLaoEKx3R14gPI97or8iyID+gO/ke9YZLZk=; b=pGJxT/+1b5N0eaXPQ8MD+apq1vM1MKAp+Icn53TKKJ0KGEnm05VOa5Y1PXrdWJnued R9YUUUBFQ3SAx68o4tq3gsy3sganiQ/LSMuSCuL8zeRVyMPSVBMwijQ+zyheaSWAu3xJ M+OPJMGhw6A30yvpkCR1omLvF+gJmffGC2W/3lpB316ys6wZpTVSfHDp9wusrVxG+kTJ 8QhIM3+WDSWjrfsSpPJlWmuFuQJHkBccKMwVYR+437mDuaT39nIrHtpckrkXjLc15TLB 3ZQ6bg5krSgAE+jYAaOpI2wf8bRjMTc6TzFNGjCyuxtK4inqkOZaPt0bxepRj/sXaXhc GF5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7RXoohFvXLaoEKx3R14gPI97or8iyID+gO/ke9YZLZk=; b=STt23aD7RVpYhd77F+yS9LfJkcUfVAm7fk4l+HgPk1C+oDelYJqUBe+qEz4YTWhJIA okh63Wss0V7ngc5SOHwAiy6/L9bXR0lqwBVv4KnQyz3G1WKUZVxhQU0HVLQdeTXBJn/1 gupvwryKj7NaWskMaFcWgMy2PVtYyhTPWXrcMHmtRj6bDLayiFYjbVRlWIkFEC1IVwId 3bNLIEAPeHJT4dd89MUdiwDAOdxaw7uxat1Ss+AVo6qcjEf6QvlZFDsuT4WHVNUzzQvq iSA+OFeNvqydyqpiuFboD3nDXKyONQB6tiBNg5XO1ppybahvNWuN4bVYVOb3YbIjXPoX rvvg== X-Gm-Message-State: AGi0Puagk5Dz21jI2MKZX+W6MtmK3bku0w3OgiutA/deI9IUo1plJlZa VrLNe5hEW+szGi+zybqt18oBC8rMGPDoke9JNOA= X-Received: by 2002:a50:ed93:: with SMTP id h19mr19481900edr.255.1586195137719; Mon, 06 Apr 2020 10:45:37 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Adrian Pop Date: Mon, 6 Apr 2020 20:45:26 +0300 Message-ID: Subject: Re: [PATCH v2] drm/bridge: dw-mipi-dsi.c: Add VPG runtime config through debugfs To: Angelo Ribeiro Cc: yannick.fertre@st.com, philippe.cornu@st.com, benjamin.gaignard@st.com, airlied@linux.ie, Daniel Vetter , mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, dri-devel@lists.freedesktop.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Gustavo Pimentel , Joao Pinto , Jose Abreu Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Angelo, Tested OK on STM32F769i-DISCO, DSI v1.30, on next-20200406. I guess there is no horizontal for BER. Regards, Adrian On Mon, Apr 6, 2020 at 4:49 PM Angelo Ribeiro wrote: > > Add support for the video pattern generator (VPG) BER pattern mode and > configuration in runtime. > > This enables using the debugfs interface to manipulate the VPG after > the pipeline is set. > Also, enables the usage of the VPG BER pattern. > > Changes in v2: > - Added VID_MODE_VPG_MODE > - Solved incompatible return type on __get and __set > > Reported-by: kbuild test robot > Reported-by: Adrian Pop > Cc: Gustavo Pimentel > Cc: Joao Pinto > Cc: Jose Abreu > Signed-off-by: Angelo Ribeiro > --- > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 98 ++++++++++++++++++++++++--- > 1 file changed, 90 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > index b18351b..9de3645 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > @@ -91,6 +91,7 @@ > #define VID_MODE_TYPE_BURST 0x2 > #define VID_MODE_TYPE_MASK 0x3 > #define VID_MODE_VPG_ENABLE BIT(16) > +#define VID_MODE_VPG_MODE BIT(20) > #define VID_MODE_VPG_HORIZONTAL BIT(24) > > #define DSI_VID_PKT_SIZE 0x3c > @@ -221,6 +222,21 @@ > #define PHY_STATUS_TIMEOUT_US 10000 > #define CMD_PKT_STATUS_TIMEOUT_US 20000 > > +#ifdef CONFIG_DEBUG_FS > +#define VPG_DEFS(name, dsi) \ > + ((void __force *)&((*dsi).vpg_defs.name)) > + > +#define REGISTER(name, mask, dsi) \ > + { #name, VPG_DEFS(name, dsi), mask, dsi } > + > +struct debugfs_entries { > + const char *name; > + bool *reg; > + u32 mask; > + struct dw_mipi_dsi *dsi; > +}; > +#endif /* CONFIG_DEBUG_FS */ > + > struct dw_mipi_dsi { > struct drm_bridge bridge; > struct mipi_dsi_host dsi_host; > @@ -238,9 +254,12 @@ struct dw_mipi_dsi { > > #ifdef CONFIG_DEBUG_FS > struct dentry *debugfs; > - > - bool vpg; > - bool vpg_horizontal; > + struct debugfs_entries *debugfs_vpg; > + struct { > + bool vpg; > + bool vpg_horizontal; > + bool vpg_ber_pattern; > + } vpg_defs; > #endif /* CONFIG_DEBUG_FS */ > > struct dw_mipi_dsi *master; /* dual-dsi master ptr */ > @@ -530,9 +549,11 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) > val |= VID_MODE_TYPE_NON_BURST_SYNC_EVENTS; > > #ifdef CONFIG_DEBUG_FS > - if (dsi->vpg) { > + if (dsi->vpg_defs.vpg) { > val |= VID_MODE_VPG_ENABLE; > - val |= dsi->vpg_horizontal ? VID_MODE_VPG_HORIZONTAL : 0; > + val |= dsi->vpg_defs.vpg_horizontal ? > + VID_MODE_VPG_HORIZONTAL : 0; > + val |= dsi->vpg_defs.vpg_ber_pattern ? VID_MODE_VPG_MODE : 0; > } > #endif /* CONFIG_DEBUG_FS */ > > @@ -961,6 +982,68 @@ static const struct drm_bridge_funcs dw_mipi_dsi_bridge_funcs = { > > #ifdef CONFIG_DEBUG_FS > > +int dw_mipi_dsi_debugfs_write(void *data, u64 val) > +{ > + struct debugfs_entries *vpg = data; > + struct dw_mipi_dsi *dsi; > + u32 mode_cfg; > + > + if (!vpg) > + return -ENODEV; > + > + dsi = vpg->dsi; > + > + *vpg->reg = (bool)val; > + > + mode_cfg = dsi_read(dsi, DSI_VID_MODE_CFG); > + > + if (*vpg->reg) > + mode_cfg |= vpg->mask; > + else > + mode_cfg &= ~vpg->mask; > + > + dsi_write(dsi, DSI_VID_MODE_CFG, mode_cfg); > + > + return 0; > +} > + > +int dw_mipi_dsi_debugfs_show(void *data, u64 *val) > +{ > + struct debugfs_entries *vpg = data; > + > + if (!vpg) > + return -ENODEV; > + > + *val = *vpg->reg; > + > + return 0; > +} > + > +DEFINE_DEBUGFS_ATTRIBUTE(fops_x32, dw_mipi_dsi_debugfs_show, > + dw_mipi_dsi_debugfs_write, "%llu\n"); > + > +static void debugfs_create_files(void *data) > +{ > + struct dw_mipi_dsi *dsi = data; > + struct debugfs_entries debugfs[] = { > + REGISTER(vpg, VID_MODE_VPG_ENABLE, dsi), > + REGISTER(vpg_horizontal, VID_MODE_VPG_HORIZONTAL, dsi), > + REGISTER(vpg_ber_pattern, VID_MODE_VPG_MODE, dsi), > + }; > + int i; > + > + dsi->debugfs_vpg = kmalloc(sizeof(debugfs), GFP_KERNEL); > + if (!dsi->debugfs_vpg) > + return; > + > + memcpy(dsi->debugfs_vpg, debugfs, sizeof(debugfs)); > + > + for (i = 0; i < ARRAY_SIZE(debugfs); i++) > + debugfs_create_file(dsi->debugfs_vpg[i].name, 0644, > + dsi->debugfs, &dsi->debugfs_vpg[i], > + &fops_x32); > +} > + > static void dw_mipi_dsi_debugfs_init(struct dw_mipi_dsi *dsi) > { > dsi->debugfs = debugfs_create_dir(dev_name(dsi->dev), NULL); > @@ -969,14 +1052,13 @@ static void dw_mipi_dsi_debugfs_init(struct dw_mipi_dsi *dsi) > return; > } > > - debugfs_create_bool("vpg", 0660, dsi->debugfs, &dsi->vpg); > - debugfs_create_bool("vpg_horizontal", 0660, dsi->debugfs, > - &dsi->vpg_horizontal); > + debugfs_create_files(dsi); > } > > static void dw_mipi_dsi_debugfs_remove(struct dw_mipi_dsi *dsi) > { > debugfs_remove_recursive(dsi->debugfs); > + kfree(dsi->debugfs_vpg); > } > > #else > -- > 2.7.4 >