Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp514856ybb; Wed, 8 Apr 2020 04:39:04 -0700 (PDT) X-Google-Smtp-Source: APiQypLpu4uYY+k9f/NjQ+M8BJgmkCWOr8FN8I4wUS78tAv/ZTVzMUbROm4XV/2IxxrV57KPOt1m X-Received: by 2002:a05:6808:2c7:: with SMTP id a7mr2102055oid.149.1586345943876; Wed, 08 Apr 2020 04:39:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1586345943; cv=none; d=google.com; s=arc-20160816; b=V+UJTh79eYYr9buFe+QNNCc6Q6NEqysWfPDx0QquWcaK7Q2kMVNQQbpVkVGKpbHXgk +lrDuBeFvUsaV2ZILHh7Xt4tIogvbzzZrltrYxihPDpChZn+ZD6PdBggxXQ92Uwz5ray IQ1c+8mPzjKoPvtFyX+PeRs5jAi2Koqso3rRV7WRQsf93r+qbAzXBEuzUwuc4iIukq5X rnYqfGTILw+ppE99UsDAmLVmGuVDAqcEebEUL9xpw9KeMOgSg/i2Bw9hhLkJSfNmoD+z kenuD36pG8ln/TXFRV25fwO8CT+2u6u91VKpC/SVx0z0xotvsHqG7VJ6mBjdOP5skHHj xcdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=2DXEBohTKfz8Bxcg/rOtdn/2OOIRswe227AGop9uVWM=; b=eHWMqCjFBH3T/nel9aX9fVJk58XMbYLdsUDbpy+2wV4B+q21JWgjkhiPI5PfbEvWT7 C6LTIuQTP1WYXr2m4uqOKKll+2co0TuK6z5U9fQXMtusDwz7K3TUXXv4rsZI3PC3qLKc LRUfWwnP5kEmvy+t4ltVO0xBuFWotIBt0rPXQoNAQM3Zk9PSNAuv+ZuVWP30a81Y5ZHz J3rtDgtqQxdqxR6Cbrs05gBIPpOLIO+OdIrtiFpoIFxniJR9jPzZd1iG0asTOzX+8Fjy Iqu9if1E0z2f1+33dmczinVbK+CJByqoRS1pPmjpwEW+aBYGKWSsPhmHV+aNXyegd+Oo 9Erw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e7si2178413ook.12.2020.04.08.04.38.50; Wed, 08 Apr 2020 04:39:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728556AbgDHLh3 convert rfc822-to-8bit (ORCPT + 99 others); Wed, 8 Apr 2020 07:37:29 -0400 Received: from relay2-d.mail.gandi.net ([217.70.183.194]:49105 "EHLO relay2-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727934AbgDHLh3 (ORCPT ); Wed, 8 Apr 2020 07:37:29 -0400 X-Originating-IP: 93.29.109.196 Received: from collins (196.109.29.93.rev.sfr.net [93.29.109.196]) (Authenticated sender: paul.kocialkowski@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 40B3F40006; Wed, 8 Apr 2020 11:37:25 +0000 (UTC) Date: Wed, 8 Apr 2020 13:37:25 +0200 From: Paul Kocialkowski To: Samuel Holland Cc: Maxime Ripard , Chen-Yu Tsai , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH] media: cedrus: Implement runtime PM Message-ID: <20200408113725.GA1439687@collins> References: <20200408010232.48432-1-samuel@sholland.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8BIT In-Reply-To: <20200408010232.48432-1-samuel@sholland.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tue 07 Apr 20, 20:02, Samuel Holland wrote: > This allows the VE clocks and PLL_VE to be disabled most of the time. > > Since the device is stateless, each frame gets a separate runtime PM > reference. Enable autosuspend so the PM callbacks are not run before and > after every frame. Looks good, thanks for the contribution :) Acked-by: Paul Kocialkowski Cheers, Paul > Signed-off-by: Samuel Holland > --- > > I tested this with v4l2-request-test. I don't have the setup to do > anything more complicated at the moment. > > --- > drivers/staging/media/sunxi/cedrus/cedrus.c | 7 ++ > .../staging/media/sunxi/cedrus/cedrus_hw.c | 115 ++++++++++++------ > .../staging/media/sunxi/cedrus/cedrus_hw.h | 3 + > 3 files changed, 88 insertions(+), 37 deletions(-) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c > index 3fad5edccd17..9aa1fc8a6c26 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -474,6 +475,11 @@ static int cedrus_remove(struct platform_device *pdev) > return 0; > } > > +static const struct dev_pm_ops cedrus_dev_pm_ops = { > + SET_RUNTIME_PM_OPS(cedrus_hw_suspend, > + cedrus_hw_resume, NULL) > +}; > + > static const struct cedrus_variant sun4i_a10_cedrus_variant = { > .mod_rate = 320000000, > }; > @@ -559,6 +565,7 @@ static struct platform_driver cedrus_driver = { > .driver = { > .name = CEDRUS_NAME, > .of_match_table = of_match_ptr(cedrus_dt_match), > + .pm = &cedrus_dev_pm_ops, > }, > }; > module_platform_driver(cedrus_driver); > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c > index daf5f244f93b..b84814d5afe4 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -63,6 +64,8 @@ int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec) > if (ctx->src_fmt.width > 2048) > reg |= VE_MODE_PIC_WIDTH_MORE_2048; > > + pm_runtime_get_sync(ctx->dev->dev); > + > cedrus_write(ctx->dev, VE_MODE, reg); > > return 0; > @@ -71,6 +74,9 @@ int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec) > void cedrus_engine_disable(struct cedrus_dev *dev) > { > cedrus_write(dev, VE_MODE, VE_MODE_DISABLED); > + > + pm_runtime_mark_last_busy(dev->dev); > + pm_runtime_put_autosuspend(dev->dev); > } > > void cedrus_dst_format_set(struct cedrus_dev *dev, > @@ -134,12 +140,72 @@ static irqreturn_t cedrus_irq(int irq, void *data) > else > state = VB2_BUF_STATE_DONE; > > + cedrus_engine_disable(dev); > + > v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, > state); > > return IRQ_HANDLED; > } > > +int cedrus_hw_resume(struct device *d) > +{ > + struct cedrus_dev *dev = dev_get_drvdata(d); > + int ret; > + > + ret = clk_prepare_enable(dev->ahb_clk); > + if (ret) { > + dev_err(dev->dev, "Failed to enable AHB clock\n"); > + > + return ret; > + } > + > + ret = clk_prepare_enable(dev->mod_clk); > + if (ret) { > + dev_err(dev->dev, "Failed to enable MOD clock\n"); > + > + goto err_ahb_clk; > + } > + > + ret = clk_prepare_enable(dev->ram_clk); > + if (ret) { > + dev_err(dev->dev, "Failed to enable RAM clock\n"); > + > + goto err_mod_clk; > + } > + > + ret = reset_control_reset(dev->rstc); > + if (ret) { > + dev_err(dev->dev, "Failed to apply reset\n"); > + > + goto err_ram_clk; > + } > + > + return 0; > + > +err_ram_clk: > + clk_disable_unprepare(dev->ram_clk); > +err_mod_clk: > + clk_disable_unprepare(dev->mod_clk); > +err_ahb_clk: > + clk_disable_unprepare(dev->ahb_clk); > + > + return ret; > +} > + > +int cedrus_hw_suspend(struct device *d) > +{ > + struct cedrus_dev *dev = dev_get_drvdata(d); > + > + reset_control_assert(dev->rstc); > + > + clk_disable_unprepare(dev->ram_clk); > + clk_disable_unprepare(dev->mod_clk); > + clk_disable_unprepare(dev->ahb_clk); > + > + return 0; > +} > + > int cedrus_hw_probe(struct cedrus_dev *dev) > { > const struct cedrus_variant *variant; > @@ -236,42 +302,19 @@ int cedrus_hw_probe(struct cedrus_dev *dev) > goto err_sram; > } > > - ret = clk_prepare_enable(dev->ahb_clk); > - if (ret) { > - dev_err(dev->dev, "Failed to enable AHB clock\n"); > - > - goto err_sram; > - } > - > - ret = clk_prepare_enable(dev->mod_clk); > - if (ret) { > - dev_err(dev->dev, "Failed to enable MOD clock\n"); > - > - goto err_ahb_clk; > - } > - > - ret = clk_prepare_enable(dev->ram_clk); > - if (ret) { > - dev_err(dev->dev, "Failed to enable RAM clock\n"); > - > - goto err_mod_clk; > - } > - > - ret = reset_control_reset(dev->rstc); > - if (ret) { > - dev_err(dev->dev, "Failed to apply reset\n"); > - > - goto err_ram_clk; > + pm_runtime_set_autosuspend_delay(dev->dev, 1000); > + pm_runtime_use_autosuspend(dev->dev); > + pm_runtime_enable(dev->dev); > + if (!pm_runtime_enabled(dev->dev)) { > + ret = cedrus_hw_resume(dev->dev); > + if (ret) > + goto err_pm; > } > > return 0; > > -err_ram_clk: > - clk_disable_unprepare(dev->ram_clk); > -err_mod_clk: > - clk_disable_unprepare(dev->mod_clk); > -err_ahb_clk: > - clk_disable_unprepare(dev->ahb_clk); > +err_pm: > + pm_runtime_disable(dev->dev); > err_sram: > sunxi_sram_release(dev->dev); > err_mem: > @@ -282,11 +325,9 @@ int cedrus_hw_probe(struct cedrus_dev *dev) > > void cedrus_hw_remove(struct cedrus_dev *dev) > { > - reset_control_assert(dev->rstc); > - > - clk_disable_unprepare(dev->ram_clk); > - clk_disable_unprepare(dev->mod_clk); > - clk_disable_unprepare(dev->ahb_clk); > + pm_runtime_disable(dev->dev); > + if (!pm_runtime_status_suspended(dev->dev)) > + cedrus_hw_suspend(dev->dev); > > sunxi_sram_release(dev->dev); > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h > index 604ff932fbf5..17822b470a1e 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h > @@ -22,6 +22,9 @@ void cedrus_engine_disable(struct cedrus_dev *dev); > void cedrus_dst_format_set(struct cedrus_dev *dev, > struct v4l2_pix_format *fmt); > > +int cedrus_hw_resume(struct device *dev); > +int cedrus_hw_suspend(struct device *dev); > + > int cedrus_hw_probe(struct cedrus_dev *dev); > void cedrus_hw_remove(struct cedrus_dev *dev); > > -- > 2.24.1 >