Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
MIME-Version: 1.0
References: <1586401829-22242-1-git-send-email-yangtiezhu@loongson.cn>
In-Reply-To: <1586401829-22242-1-git-send-email-yangtiezhu@loongson.cn>
From:   YunQiang Su <wzssyqa@gmail.com>
Date:   Thu, 9 Apr 2020 12:43:28 +0800
Message-ID: <CAKcpw6XywbOs-rh5ko0uz9vLz9nkgrJ0LiRTSkQQaU9dZbg7oQ@mail.gmail.com>
Subject: Re: [PATCH] MIPS: Limit check_bugs32() under CONFIG_32BIT
To:     Tiezhu Yang <yangtiezhu@loongson.cn>
Cc:     Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        linux-mips <linux-mips@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Xuefeng Li <lixuefeng@loongson.cn>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Tiezhu Yang <yangtiezhu@loongson.cn> =E4=BA=8E2020=E5=B9=B44=E6=9C=889=E6=
=97=A5=E5=91=A8=E5=9B=9B =E4=B8=8A=E5=8D=8811:10=E5=86=99=E9=81=93=EF=BC=9A
>
> There is no need to build and call check_bugs32() under CONFIG_64BIT,
> just limit it under CONFIG_32BIT.

Since 32bit is subset of 64bit, and due to the code, I think that the
initial purpose
of check_bugs32() is also willing to run even with CONFIG_64BIT.

For example, if we have a CPU which is 64bit, and work well on 64bit mode, =
while
has a bug only on 32bit mode, check_bugs32 should be used here.

Loongson's 3A 1000 is the example, I cannot support FP32 mode well.

>
> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
> ---
>  arch/mips/include/asm/bugs.h | 4 +++-
>  arch/mips/kernel/cpu-probe.c | 2 ++
>  2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/bugs.h b/arch/mips/include/asm/bugs.h
> index d72dc6e..5f8d2bf 100644
> --- a/arch/mips/include/asm/bugs.h
> +++ b/arch/mips/include/asm/bugs.h
> @@ -35,7 +35,9 @@ static inline void check_bugs(void)
>         unsigned int cpu =3D smp_processor_id();
>
>         cpu_data[cpu].udelay_val =3D loops_per_jiffy;
> -       check_bugs32();
> +
> +       if (IS_ENABLED(CONFIG_32BIT))
> +               check_bugs32();
>
>         if (IS_ENABLED(CONFIG_CPU_R4X00_BUGS64))
>                 check_bugs64();
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index f21a230..85d7273 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -461,6 +461,7 @@ static inline void cpu_set_mt_per_tc_perf(struct cpui=
nfo_mips *c)
>                 c->options |=3D MIPS_CPU_MT_PER_TC_PERF_COUNTERS;
>  }
>
> +#ifdef CONFIG_32BIT
>  static inline void check_errata(void)
>  {
>         struct cpuinfo_mips *c =3D &current_cpu_data;
> @@ -484,6 +485,7 @@ void __init check_bugs32(void)
>  {
>         check_errata();
>  }
> +#endif /* CONFIG_32BIT */
>
>  /*
>   * Probe whether cpu has config register by trying to play with
> --
> 2.1.0
>


--=20
YunQiang Su