Received: by 2002:a25:6193:0:0:0:0:0 with SMTP id v141csp426840ybb; Fri, 10 Apr 2020 02:58:59 -0700 (PDT) X-Google-Smtp-Source: APiQypKAWJjxX4b/SjTdxNSzVBLnh80OhyqLznKAQVpTfjeLu2mU2NLT9uhiVrBOWdsNxsqJ0r3I X-Received: by 2002:ac8:16e4:: with SMTP id y33mr3785561qtk.4.1586512738939; Fri, 10 Apr 2020 02:58:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1586512738; cv=none; d=google.com; s=arc-20160816; b=i1sCEMLMYsKJsY1CpFItanasmvJDaOYnpt4ITv6LorCObPXnTdKCo8KSLRqX3v0qU2 q03TLNlWZw7nQFOBN18ejH6Seb/MPYTDDBqKHhhYHNF29t7zCJQaSZocLJkfi51+5qpW CeL4W478a/dVzTQLDmx1mvfzkT489KPBMLnByBI7FvUn02Rh4WOGK6vM53goOpo5O8Jw DP7RrTaJwkNUGoBQbOGCAfdX3LKD43Qp1WbM2T5B8proYvq4bYvyqyWIBeybDPVLJN8P bv+gVz8LXHFw3jtK5J1MfLYJ6dkuymg+lHultoRwbCEmRulM/PglPJf7Kxc1K1OYQqrc lGSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version; bh=Mph6QgrJ/xrgnWVAXMDXg6jAQJ4ZS9AX8V+syWXWzv8=; b=MsZayQ3un+dx+XhVcDwh6UggjzTLQ+SeKki70CkMYCbKGEii54zvmen3IRrDz+xYsV P3gjOIQ0UHkdsPsRv/WxcG/87y9O0KQn21+nT3UYl+sCHNL+j+Ucuvw7qflWnVNnZaQ+ FPeQiXusoAyX30283knbQTbA/8Ar7klMUumQ6MVOXdZtxkq1CqZy8hbcTRrTAmtjomzh 0Bn5v/ScwRKxCR8EbfPMtO2Q7CWTT17lVKb3yziu0XBv6TGJ/mtNqJKJZPEytUjt0vUU BWTxqSOexZ26Cot1AmmU0t0H49qQ4OIKkiguPt778r6H+FVCN/yqXLjsiuVE5r5SE345 3y4g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g12si754729qvy.112.2020.04.10.02.58.44; Fri, 10 Apr 2020 02:58:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726179AbgDJJ4f (ORCPT + 99 others); Fri, 10 Apr 2020 05:56:35 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:53153 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726111AbgDJJ4f (ORCPT ); Fri, 10 Apr 2020 05:56:35 -0400 Received: from mail-qv1-f46.google.com ([209.85.219.46]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.145]) with ESMTPSA (Nemesis) id 1MTiLj-1jqnSZ2iz7-00U6HF for ; Fri, 10 Apr 2020 11:56:34 +0200 Received: by mail-qv1-f46.google.com with SMTP id q73so706294qvq.2 for ; Fri, 10 Apr 2020 02:56:34 -0700 (PDT) X-Gm-Message-State: AGi0PuYBcsuhhGiFyV0b3zM52lgqMhGjkfPJABoOB3v5TZflnswZFexa vzhoQ4Qba10YwDgyPQSSTLQ+5X8QP4P5HCh51ys= X-Received: by 2002:a0c:fc03:: with SMTP id z3mr4142553qvo.210.1586512593511; Fri, 10 Apr 2020 02:56:33 -0700 (PDT) MIME-Version: 1.0 References: <20200409232728.231527-1-caij2003@gmail.com> In-Reply-To: <20200409232728.231527-1-caij2003@gmail.com> From: Arnd Bergmann Date: Fri, 10 Apr 2020 11:56:16 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] ARM: do not assemble iwmmxt.S with LLVM toolchain To: Jian Cai Cc: Nick Desaulniers , Manoj Gupta , Peter.Smith@arm.com, Stefan Agner , Sami Tolvanen , Ilie Halip , jiancai@google.com, Russell King , Linus Walleij , Andrew Morton , Mauro Carvalho Chehab , Doug Anderson , Benjamin Gaignard , Bartosz Golaszewski , Masahiro Yamada , Masami Hiramatsu , "Steven Rostedt (VMware)" , Greg Kroah-Hartman , Tejun Heo , "Joel Fernandes (Google)" , Patrick Bellasi , Krzysztof Kozlowski , Dan Williams , "Eric W. Biederman" , David Howells , Linux ARM , "linux-kernel@vger.kernel.org" , clang-built-linux Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:1Dxc3cpHZpOhCp274aTD5GzKXjubUve7Eh+PYVOqYWehQcDvLa2 tQKllDt7QZVaGFwp27Zg2pkp+AaVPCibj8ggY2ERd3E7sZOD6kMtiGAxBor/ix0Q2vosc5F gtqtkLa9Be7JXxK1cmkk0WSwB3D6hDZOLBMOmBLAGe/x9KRNtJhjxp/No+oXnomsK/k4muo 3Y/plueMV+7bSX0ADYVCQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:WsMgX1qVOp4=:bveoDfjzjuN06LRP63iTfC 3okN6nIRfPjZCxpyXH2nhJjHj1HeCRYCdQSgAdI7s1Vf/KDuG9Mqv6MIK+X6BemXEfZ0SV2Yo AO7gkqPrPj81o7SgDON66kXiLGf1mBUhQ+i9NhI3B3VrxR0EFyCcKzueqps3YbbvZgr2h3PVc 9CSLqUkYxTbahoTC8WqbHWYVXE8t2JJZe+o6QTvJH4aRoFAJAizWmdP7YvMB1lbQrmhg1gH7q uWpQ+M+1HJhEmwPngSyTnWbZ1BMOSGoZiImj8eougrBCZiEOsbKmEi6wtFUmalz1SQZavxrIg /FNUTvzFveR3fQA85v0J2kuQgxqPXvnlS7SZSbODUJqJrLLVZbfR1WRtmr9iqvBEp0im2MNzg WlEsHKRHEqv4OgHi/2fOphlJ+9MnFJ/7ZQqf+ElZt4vf5TEowlUidHZGYLiW6w0/Ko1Ou6lqk lHLh3oo/dorigj7HtCJTNCaFUDsR943dNffQD633dRTbVfk9KN7TOHjrFrFofnpV6ZIandXwP JCfB0Mn6m1eon0qjdvBDMCUngmgvnorYVVaVU97qs4m/7ZWamZT2Tm6N2ettQ2+3bN+lqvGPI Yqy7qqgKUIwzLs78UQ/OhTpn4n6fnAhw2stoBOOyc/XK0K1u5B8D/vtEaUoRAyGQk1lFHTIbS mAoE5+mPFpxUTcb+oaZ1/L9ayTq6ql56vdFtXPTpv0WwRHtpOQnWHFn/aSrPibtXBdxlaEyXn EpVzPVefpH66pxladF67ibSuHKJS/mSBr8D04iXcHefBJI0kdy3MiR+RTZQEIbL5CVqxazb38 EvlrvVw88P5eX+7OYlOWWSA6pYFxlXQD08dEiK/hcBvcbSf1Uc= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 10, 2020 at 1:28 AM Jian Cai wrote: > > iwmmxt.S contains XScale instructions LLVM ARM backend does not support. > Skip this file if LLVM integrated assemmbler or LLD is used to build ARM > kernel. > > Signed-off-by: Jian Cai It clearly makes sense to limit the Kconfig option to compilers that can actually build it. A few questions though: - Given that Armada XP with its PJ4B was still marketed until fairly recently[1], wouldn't it make sense to still add support for it? Is it a lot of work? - Why does the linker have to understand it, rather than just the assembler? > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 66a04f6f4775..39de8fc64a73 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -804,7 +804,7 @@ source "arch/arm/mm/Kconfig" > > config IWMMXT > bool "Enable iWMMXt support" > - depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B > + depends on !AS_IS_CLANG && !LD_IS_LLD && (CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B) I would suggest splitting it into two lines for readability: depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B depends on !AS_IS_CLANG && !LD_IS_LLD Arnd [1] http://web.archive.org/web/20191015165247/https://www.marvell.com/embedded-processors/armada/index.jsp