Message-ID: <44047565.3090202@sgi.com>
Date: Tue, 28 Feb 2006 17:08:05 +0100
From: Jes Sorensen <jes@sgi.com>
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To: Roland Dreier <rdreier@cisco.com>
CC: "Bryan O'Sullivan" <bos@pathscale.com>, Andrew Morton <akpm@osdl.org>,
       Andi Kleen <ak@suse.de>, linux-kernel <linux-kernel@vger.kernel.org>,
       Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: [PATCH] Define wc_wmb, a write barrier for PCI write combining
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Roland Dreier wrote:
>     Jes> Could you explain why the current mmiowb() API won't suffice
>     Jes> for this?  It seems that this is basically trying to achieve
>     Jes> the same thing.
> 
> I don't believe mmiowb() is at all the same thing.  mmiowb() is all
> about ordering writes between _different_ CPUs without incurring the
> cost of flushing posted writes by issuing a read on the bus.

Not quite correct as far as I understand it. mmiowb() is supposed to
guarantee that writes to MMIO space have completed before continuing.
That of course covers the multi-CPU case, but it should also cover the
write-combining case.

 > wc_wmb()
> would just act like a true wmb(), even when using write-combining
> regions on x86 -- in other words, there would be no cross-CPU synchronization.

I wary of adding yet another variation unless there is a clear
distinction between them that is easy to understandn for driver authors.

Cheers,
Jes
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