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[23.128.96.18]) by mx.google.com with ESMTP id by30si6340683edb.513.2020.04.14.21.22.57; Tue, 14 Apr 2020 21:23:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@lunn.ch header.s=20171124 header.b=cOXAiD8Z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388807AbgDMVQJ (ORCPT + 99 others); Mon, 13 Apr 2020 17:16:09 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:34936 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388795AbgDMVQI (ORCPT ); Mon, 13 Apr 2020 17:16:08 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=idZP78QLfRjhluguquTHPSQeRBXMkj6qqFAj2rwGa5w=; b=cOXAiD8Z/xYKoms96+wgVqIB23 M6eSFqZbbD7Lcbr7Iy9lPSGpmY+zjW1RGpWYDh5z7H7xnxizf6McwVPLyGt6bcJI1dOYWkTChf31P nQbZp+BPnlKBjaUGQdbAjrDxq2f3JIL6L6mgeYUC/ISqV2z+tzJDTXoJU97JWRggxV6s=; Received: from andrew by vps0.lunn.ch with local (Exim 4.93) (envelope-from ) id 1jO6Q8-002W4d-Hz; Mon, 13 Apr 2020 23:15:08 +0200 Date: Mon, 13 Apr 2020 23:15:08 +0200 From: Andrew Lunn To: Nick Desaulniers Cc: Arnd Bergmann , Linus Walleij , Peter Smith , Stefan Agner , David Howells , Mauro Carvalho Chehab , Manoj Gupta , Benjamin Gaignard , "Joel Fernandes (Google)" , Jian Cai , clang-built-linux , Ilie Halip , Masahiro Yamada , Russell King , Krzysztof Kozlowski , Bartosz Golaszewski , Sami Tolvanen , "Eric W. Biederman" , "Steven Rostedt (VMware)" , Jian Cai , Doug Anderson , Dan Williams , Linux ARM , Greg Kroah-Hartman , "linux-kernel@vger.kernel.org" , Patrick Bellasi , Masami Hiramatsu , Tejun Heo , Andrew Morton Subject: Re: [PATCH] ARM: do not assemble iwmmxt.S with LLVM toolchain Message-ID: <20200413211508.GE436020@lunn.ch> References: <20200409232728.231527-1-caij2003@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 13, 2020 at 12:20:57PM -0700, Nick Desaulniers wrote: > On Fri, Apr 10, 2020 at 2:56 AM Arnd Bergmann wrote: > > > > On Fri, Apr 10, 2020 at 1:28 AM Jian Cai wrote: > > > > > > iwmmxt.S contains XScale instructions LLVM ARM backend does not support. > > > Skip this file if LLVM integrated assemmbler or LLD is used to build ARM > > > kernel. > > > > > > Signed-off-by: Jian Cai > > > > It clearly makes sense to limit the Kconfig option to compilers that > > can actually build it. > > A few questions though: > > > > - Given that Armada XP with its PJ4B was still marketed until fairly > > recently[1], > > wouldn't it make sense to still add support for it? Is it a lot of work? > > Sorry, can you help me verify from that link that PJ4B uses XSCALE? I think you missed my email. iwmmxt is not Xscale. iwmmxt is an instruction set of its own, which any ARM processor could implement. > I > didn't see references to either in the link provided. Also, given the > history of XSCALE as noted by Russell, I'm surprised to see Marvell in > the mix. https://en.wikipedia.org/wiki/XScale XScale comprises several distinct families: IXP, IXC, IOP, PXA and CE. Intel sold the PXA family to Marvell Technology Group in June 2006.[1] Marvell then extended the brand to include processors with other microarchitectures, like ARM's Cortex. Andrew