Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp607298ybz; Wed, 15 Apr 2020 15:03:05 -0700 (PDT) X-Google-Smtp-Source: APiQypLIu1W8y2uJpjcyFS4jdCJ09LiaMLtCbmgTYAQQy2z1IhyBvVOFviVnk27XRmeaUjeiXb5F X-Received: by 2002:a17:906:310e:: with SMTP id 14mr7212455ejx.177.1586988185444; Wed, 15 Apr 2020 15:03:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1586988185; cv=none; d=google.com; s=arc-20160816; b=wSwkaMGuyEyTZINLZ0EzZTocav+PH3hG/POBEimsK9K39jw9NxYyI64AoV8ZJvc4w4 IF1KdqtiGeNXO+KnjxhxCObizPKbb7WtcXMgZSv63k48k1rwJ1H8vlHYqlpEKaQci3Ui r7obNJVXkHPF+eXxS3ZxCF5moPjChLqsKoVext4tZngW1DU/QPDYNnp3HGtTgK6KyFVO 9SSTRkVgyqiBR+B3t3Vh89hDlJLUsgjOIYXmxbeXSMEBqJcgbjcbXW1hVUAahEk98qVe I3OlJqWdL2HhLTlBvsZppdRXi0v2Khg8e+YhKNQ3vBYvNM0JXbFVInko/lP853rZHozg fqrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:authenticated-by; bh=RAQa+Wrkbw2Tq2UUSkUYHoZb1RVLrefzBbXPOVgVun8=; b=FerkxGgVWaaHXPr3vzuAanHUV5ROk5G2kkNN5j5IUeEdQLrQXsiGPffGVL0/Si7d0p /7dhxSVhCOW6iTtl9QR2YFRhdq5XtOG8hUIz15ztMGzSybip/b/An4bLTG09+uTzX/Z+ AexENSucNlif9YceWSNoi7iD+zge55g6FcQR7mBSikv5oLXfDFoNDwAYC/BJBCWnB6oW rPyqioH4PDyDzSKQ7g5zoH/F6UKc8SgSIMavyhgozTXJA0UFzySkjx2hej7PibcHqjSt M1hSX4V82C8vkO8/I4kZRvV33EavZVvVnM16sGQpOlLTaebinSnbSPbnXWf94vyXapLL LNQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b7si8181727edy.494.2020.04.15.15.02.39; Wed, 15 Apr 2020 15:03:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392965AbgDOCif (ORCPT + 99 others); Tue, 14 Apr 2020 22:38:35 -0400 Received: from rtits2.realtek.com ([211.75.126.72]:37516 "EHLO rtits2.realtek.com.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728267AbgDOCia (ORCPT ); Tue, 14 Apr 2020 22:38:30 -0400 Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.69 with qID 03F2cIomD017212, This message is accepted by code: ctloc85258 Received: from RS-CAS02.realsil.com.cn (ms1.realsil.com.cn[172.29.17.3]) by rtits2.realtek.com.tw (8.15.2/2.66/5.86) with ESMTPS id 03F2cIomD017212 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 15 Apr 2020 10:38:18 +0800 Received: from localhost (172.29.40.150) by RS-CAS02.realsil.com.cn (172.29.17.3) with Microsoft SMTP Server id 14.3.439.0; Wed, 15 Apr 2020 10:38:17 +0800 From: To: , CC: , Rui Feng Subject: [PATCH] misc: rtsx: Improve compatibility for rts5261 Date: Wed, 15 Apr 2020 10:37:17 +0800 Message-ID: <1586918237-3016-1-git-send-email-rui_feng@realsil.com.cn> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [172.29.40.150] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rui Feng Change initial clock to improve compatibility for rts5261 Signed-off-by: Rui Feng --- drivers/misc/cardreader/rts5261.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/misc/cardreader/rts5261.c b/drivers/misc/cardreader/rts5261.c index bc4967a6efa1..547db5ffd3f6 100644 --- a/drivers/misc/cardreader/rts5261.c +++ b/drivers/misc/cardreader/rts5261.c @@ -639,8 +639,13 @@ int rts5261_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, if (initial_mode) { /* We use 250k(around) here, in initial stage */ - clk_divider = SD_CLK_DIVIDE_128; - card_clock = 30000000; + if (is_version(pcr, PID_5261, IC_VER_D)) { + clk_divider = SD_CLK_DIVIDE_256; + card_clock = 60000000; + } else { + clk_divider = SD_CLK_DIVIDE_128; + card_clock = 30000000; + } } else { clk_divider = SD_CLK_DIVIDE_0; } -- 2.17.1