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Wed, 15 Apr 2020 07:57:28 +0000 Subject: Re: [PATCH] Optimized division operation to shift operation To: Jani Nikula , Alex Deucher , Bernard Zhao Cc: Alex Sierra , Oak Zeng , Maling list - DRI developers , David Airlie , Felix Kuehling , LKML , amd-gfx list , kernel@vivo.com, Huang Rui , Kent Russell , Alex Deucher , Sam Ravnborg , Xiaojie Yuan References: <1586864113-30682-1-git-send-email-bernard@vivo.com> <87lfmx5h72.fsf@intel.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: Date: Wed, 15 Apr 2020 09:57:16 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 In-Reply-To: <87lfmx5h72.fsf@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-ClientProxiedBy: FRYP281CA0007.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10::17) To DM6PR12MB4401.namprd12.prod.outlook.com (2603:10b6:5:2a9::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [IPv6:2a02:908:1252:fb60:be8a:bd56:1f94:86e7] (2a02:908:1252:fb60:be8a:bd56:1f94:86e7) by FRYP281CA0007.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2921.25 via Frontend Transport; Wed, 15 Apr 2020 07:57:25 +0000 X-Originating-IP: [2a02:908:1252:fb60:be8a:bd56:1f94:86e7] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 90c6ddf6-2092-4351-e186-08d7e112a438 X-MS-TrafficTypeDiagnostic: DM6PR12MB2939:|DM6PR12MB2939: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; X-Forefront-PRVS: 0374433C81 X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM6PR12MB4401.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(10009020)(4636009)(366004)(376002)(346002)(136003)(39860400002)(396003)(31686004)(45080400002)(316002)(31696002)(86362001)(54906003)(478600001)(966005)(8936002)(5660300002)(2906002)(53546011)(81156014)(52116002)(8676002)(110136005)(6666004)(66476007)(6486002)(16526019)(66556008)(2616005)(66946007)(4326008)(186003)(36756003);DIR:OUT;SFP:1101; Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: d+Rz/JGeGreoLC+yNBp4PXB1fxvy+T++D8YThOsya+SdU9gVvyt0tbarL6jCi4WYw+8wHtazOh3wBg0ForYBdBVKNsGqSWwheMsLQUfCPfwMuyWNR4+Z6FuqTHzHeV49jtTCuMcrYfar9FazP92aSF8bpHU/RRj9AgeDAA1RjPdGRLb0d+b7Ib/BlohkL/tXqKufCKhcZ2yq4yM/cUdtSybxp6ApoZO3tL1eB7JJmFLAnzzVHhEaPmi3UTqPdn716euKOzaaDOgKirDL5gTxTnB91uudfXmX9kktIatk4gu5Du/NGMoYvaoRyI2hPG3tPLSe5kkNPDej6YrnlaR2hS1nFPeUXcS2BkFJo6xm9yJNJcT7VZHezSC+5eBfQ2TFEaJZ8U8LNVVeVAoVJwsAviIUi7VBPhCXWDTThKnAAELyg69w1dPGiRtFNFaqKCH7sowTea8VypO9Mves0wuYN87DyOxj2j7X+ejR4Gih4E0= X-MS-Exchange-AntiSpam-MessageData: ICv30Vd7Gklg6DnBoGB3c9LMvkKVJCVgeJUxKSimZ8TDdMZMECQA9wK4TyOgpo/0Nvk3NtoGdd0bQlQygixEeTm6bFuvHJ8EjUMj1lk5iZ0CZq8BWGZdprqISqNO8cW6QQw+H+yV+FkvOXeEYpzv4mc/eJXXPndM3yyZb9wvlFnIKj2BjE95jBE//Zz2o/OZQsZNiFTNP629ZhvFlvJP6w== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 90c6ddf6-2092-4351-e186-08d7e112a438 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2020 07:57:27.9247 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jrVziHQ7iVyDM+0zjGjc2BzpSffEVJmEn3OirbP2DTMR3fE9muP18CdnFnSGwQs/ X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2939 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am 15.04.20 um 09:41 schrieb Jani Nikula: > On Tue, 14 Apr 2020, Alex Deucher wrote: >> On Tue, Apr 14, 2020 at 9:05 AM Bernard Zhao wrote: >>> On some processors, the / operate will call the compiler`s div lib, >>> which is low efficient, We can replace the / operation with shift, >>> so that we can replace the call of the division library with one >>> shift assembly instruction. > This was applied already, and it's not in a driver I look after... but > to me this feels like something that really should be > justified. Using >> instead of / for multiples of 2 division mattered 20 > years ago, I'd be surprised if it still did on modern compilers. I have similar worries, especially since we replace the "/ (4 * 2)" with ">> 3" it's making the code just a bit less readable. And that the code runs exactly once while loading the driver and pushing the firmware into the hardware. So performance is completely irrelevant here. Regards, Christian. > > BR, > Jani. > > >>> Signed-off-by: Bernard Zhao >> Applied. thanks. >> >> Alex >> >>> --- >>> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++-- >>> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++-- >>> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++-- >>> 3 files changed, 6 insertions(+), 6 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c >>> index b205039..66cd078 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c >>> @@ -175,10 +175,10 @@ static int gmc_v6_0_mc_load_microcode(struct amdgpu_device *adev) >>> amdgpu_ucode_print_mc_hdr(&hdr->header); >>> >>> adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); >>> - regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2); >>> + regs_size = le32_to_cpu(hdr->io_debug_size_bytes) >> 3; >>> new_io_mc_regs = (const __le32 *) >>> (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); >>> - ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; >>> + ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) >> 2; >>> new_fw_data = (const __le32 *) >>> (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c >>> index 9da9596..ca26d63 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c >>> @@ -193,10 +193,10 @@ static int gmc_v7_0_mc_load_microcode(struct amdgpu_device *adev) >>> amdgpu_ucode_print_mc_hdr(&hdr->header); >>> >>> adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); >>> - regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2); >>> + regs_size = le32_to_cpu(hdr->io_debug_size_bytes) >> 3; >>> io_mc_regs = (const __le32 *) >>> (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); >>> - ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; >>> + ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) >> 2; >>> fw_data = (const __le32 *) >>> (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c >>> index 27d83204..295039c 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c >>> @@ -318,10 +318,10 @@ static int gmc_v8_0_tonga_mc_load_microcode(struct amdgpu_device *adev) >>> amdgpu_ucode_print_mc_hdr(&hdr->header); >>> >>> adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); >>> - regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2); >>> + regs_size = le32_to_cpu(hdr->io_debug_size_bytes) >> 3; >>> io_mc_regs = (const __le32 *) >>> (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); >>> - ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; >>> + ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) >> 2; >>> fw_data = (const __le32 *) >>> (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); >>> >>> -- >>> 2.7.4 >>> >>> _______________________________________________ >>> amd-gfx mailing list >>> amd-gfx@lists.freedesktop.org >>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cchristian.koenig%40amd.com%7C1e91f7edcfe0473b0d7008d7e11074a8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637225333103893889&sdata=VDJlEY2%2Bl1SSO8Fw1dYqqPFqQtyHpsxQ0Tm7iVOgJQY%3D&reserved=0 >> _______________________________________________ >> dri-devel mailing list >> dri-devel@lists.freedesktop.org >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fdri-devel&data=02%7C01%7Cchristian.koenig%40amd.com%7C1e91f7edcfe0473b0d7008d7e11074a8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637225333103893889&sdata=EpqRRbCiksur%2BjMlVQplExuJsmw6UPODhyBOutOVukw%3D&reserved=0