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[23.128.96.18]) by mx.google.com with ESMTP id l3si11136841edw.569.2020.04.15.16.05.19; Wed, 15 Apr 2020 16:05:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2897901AbgDOLzO (ORCPT + 99 others); Wed, 15 Apr 2020 07:55:14 -0400 Received: from sauhun.de ([88.99.104.3]:53290 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2409185AbgDOLpi (ORCPT ); Wed, 15 Apr 2020 07:45:38 -0400 Received: from localhost (p54B33507.dip0.t-ipconnect.de [84.179.53.7]) by pokefinder.org (Postfix) with ESMTPSA id AFE072C1FF1; Wed, 15 Apr 2020 13:45:36 +0200 (CEST) Date: Wed, 15 Apr 2020 13:45:36 +0200 From: Wolfram Sang To: Dmitry Osipenko Cc: Thierry Reding , Jonathan Hunter , Laxman Dewangan , linux-i2c@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/2] NVIDIA Tegra I2C synchronization correction Message-ID: <20200415114536.GB910@ninjato> References: <20200324191217.1829-1-digetx@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="Fba/0zbH8Xs+Fj9o" Content-Disposition: inline In-Reply-To: <20200324191217.1829-1-digetx@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --Fba/0zbH8Xs+Fj9o Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Mar 24, 2020 at 10:12:15PM +0300, Dmitry Osipenko wrote: > Hello, >=20 > Recently I found a way to reliably reproduce I2C timeouts that happen due > to improper synchronizations made by the I2C driver. It's quite easy to > reproduce the problem when memory is running on a lower freq + there is > some memory activity + CPU could get busy for a significant time. This > is the case when KASAN is enabled and CPU is busy while accessing FS via > NFS. This small series addresses the found problems. >=20 > Changelog: >=20 > v2: - The "Better handle case where CPU0 is busy for a long time" patch > now preserves the old behavior where completion is checked after > disabling the interrupt, preventing potential race-condition of > the completion awaiting vs interrupt syncing. >=20 > Dmitry Osipenko (2): > i2c: tegra: Better handle case where CPU0 is busy for a long time > i2c: tegra: Synchronize DMA before termination Patches look good to me. I tend to apply them to for-current instead of for-next because they are fixing issues. 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