Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp667356ybz; Wed, 15 Apr 2020 16:16:05 -0700 (PDT) X-Google-Smtp-Source: APiQypLZ2mQK4YPFPY/0MyyX1UBM2zrI7Lbxhwk4b/UXGorBrxu+vLb0rUgJKQiIyAfYjpALoM2y X-Received: by 2002:aa7:ce82:: with SMTP id y2mr27532416edv.11.1586992565519; Wed, 15 Apr 2020 16:16:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1586992565; cv=none; d=google.com; s=arc-20160816; b=fmTIHRkIrNOmDloBZgY0ypHPIGd8A3VapfApIxq/IVSXgQfUPiwCBNQg4AHm5clpdy k5BriftywqlXvChSp2PLmmFvDfPWPl6t9VZlyrLFMP3mXrmjxLQLzLTaB1wHmql/I26z gdMxuhtvJApzYLcZ07qVGro5cfaT21oULgpl9iCqVM56mUyLy4emP6k1zN5TS6F5hVML nmu+rMkbeewZkWlbeFzMAoMwQ7UxwZDBYODWyp90BniwNd7opluZsH23mVoujVFBW/vg mXZR9jA/EQdQg9okhHJ+uWDtlkLNlokQLjpimeNO6u0NjKcu9660Ql8OoIvOQ38UzYWE DQpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:organization:from:references:cc:to:subject:ironport-sdr :ironport-sdr; bh=fPzxmSOLzIz0FP02jGRKbwEUcj8kz5HVt5Xxxm0IXII=; b=wo9JeUr9tXm+C7zF4nfnV/UD1qZ2mk4Fv8erIs2NoZL4C6WJng9b2N38cFsLhuxYae tc4s39J3Dm7GwazN3cDiN6HBXN+yOdELQLiQeF+U0qG1NY472yb4hBCU1+bHCcNBx5sN Cbxhh3MrbeA/ho3OBbndcy3HwZpL/yM0a0X2TWM5qH4uClukRnEd//KCedeeLgFhEkge Wv1XFUAv7pMs/YkwF9SiFyGqU+A2X5r1jrxiuXNcM5EtDAkRrzCWEb2qZMIzU/LLC2tX JlOsGPbsR99FJO5umc8jM02iVAVErU6Gyu7+OwF8v2Wfkv0jvSwmk5LDt/+YQDvO8L8C Lznw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n8si10449152ejg.67.2020.04.15.16.15.42; Wed, 15 Apr 2020 16:16:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2409875AbgDOM1O (ORCPT + 99 others); Wed, 15 Apr 2020 08:27:14 -0400 Received: from mga09.intel.com ([134.134.136.24]:61376 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2409850AbgDOM0s (ORCPT ); Wed, 15 Apr 2020 08:26:48 -0400 IronPort-SDR: 5bJ7U6SeDIVyBLtowxZF96Jj/UpGs+hzm04CObueHbTO2OtLQIK6oBdykosymwkS1qw5vzJG+9 J3FdRoTu4Kcg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2020 05:26:45 -0700 IronPort-SDR: h9oBrlVuMfihHlm+c7RReoucOSid7EY9BIvBcCULrmmStw1b50KZcCYstK6IciHld7GaviMPoZ ZVX8WeOr083g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,386,1580803200"; d="scan'208";a="400298276" Received: from ahunter-desktop.fi.intel.com (HELO [10.237.72.87]) ([10.237.72.87]) by orsmga004.jf.intel.com with ESMTP; 15 Apr 2020 05:26:42 -0700 Subject: Re: [PATCH 1/7] mmc: sdhci: fix base clock usage in preset value To: =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= , Ulf Hansson , Kevin Liu , Michal Simek , Suneel Garapati Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org References: <23c3fe72b0ff0eabdbf3a45023a76da1b18a7e90.1585827904.git.mirq-linux@rere.qmqm.pl> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <218dd61b-48cc-a161-240f-b3823e8f48cb@intel.com> Date: Wed, 15 Apr 2020 15:25:52 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <23c3fe72b0ff0eabdbf3a45023a76da1b18a7e90.1585827904.git.mirq-linux@rere.qmqm.pl> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/04/20 2:54 pm, Michał Mirosław wrote: > Fixed commit added an unnecessary read of CLOCK_CONTROL. The value read > is overwritten for programmable clock preset, but is carried over for > divided clock preset. This can confuse sdhci_enable_clk() if the register > has enable bits set for some reason at time time of clock calculation. > value to be ORed with enable flags. Remove the read. The read is not needed, but drivers usually manage the enable bits, especially disabling the clock before changing the frequency. What driver is it? > > Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function") > Signed-off-by: Michał Mirosław > --- > drivers/mmc/host/sdhci.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 3f716466fcfd..9aa3af5826df 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -1765,7 +1765,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, > if (host->preset_enabled) { > u16 pre_val; > > - clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > pre_val = sdhci_get_preset_value(host); > div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); > if (host->clk_mul && >