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Subject: Re: [v2 1/3] drm/msm/dpu: add support for clk and bw scaling for
 display
To:     Krishna Manikandan <mkrishn@codeaurora.org>
Cc:     dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
        freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, robdclark@gmail.com,
        seanpaul@chromium.org, hoegsberg@chromium.org,
        kalyan_t@codeaurora.org, nganji@codeaurora.org
References: <1585810370-6099-1-git-send-email-mkrishn@codeaurora.org>
From:   Georgi Djakov <georgi.djakov@linaro.org>
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Message-ID: <80ce1cfd-59ac-6565-bcbd-a6816592e586@linaro.org>
Date:   Wed, 15 Apr 2020 16:59:00 +0300
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In-Reply-To: <1585810370-6099-1-git-send-email-mkrishn@codeaurora.org>
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Sender: linux-kernel-owner@vger.kernel.org
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Hi Krishna,

Thanks for the patch!

On 4/2/20 09:52, Krishna Manikandan wrote:
> This change adds support to scale src clk and bandwidth as
> per composition requirements.
> 
> Interconnect registration for bw has been moved to mdp
> device node from mdss to facilitate the scaling.

No Signed-off-by ?

> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c  | 106 +++++++++++++++++++++----
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c |   5 +-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h |   4 +
>  drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c        |  37 ++++++++-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h        |   4 +
>  drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c       |   9 ++-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c      |  82 +++++++++++++++++++
>  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h      |   4 +
>  8 files changed, 228 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

[..]
> @@ -186,10 +247,21 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
>  			perf.max_per_pipe_ib = max(perf.max_per_pipe_ib,
>  					dpu_cstate->new_perf.max_per_pipe_ib);
>  
> -			DPU_DEBUG("crtc=%d bw=%llu\n", tmp_crtc->base.id,
> -					dpu_cstate->new_perf.bw_ctl);
> +			perf.bw_ctl += dpu_cstate->new_perf.bw_ctl;
> +
> +			DPU_DEBUG("crtc=%d bw=%llu paths:%d\n",
> +				  tmp_crtc->base.id,
> +				  dpu_cstate->new_perf.bw_ctl, kms->num_paths);
>  		}
>  	}
> +
> +	avg_bw = kms->num_paths ?
> +			perf.bw_ctl / kms->num_paths : 0;
> +
> +	for (i = 0; i < kms->num_paths; i++)
> +		icc_set_bw(kms->path[i],
> +			Bps_to_icc(avg_bw), (perf.max_per_pipe_ib));

In what units is max_per_pipe_ib? Can you use Bps_to_icc() or KBps_to_icc()?

> +
>  	return ret;
>  }
>

[..]

> @@ -1037,8 +1065,15 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev)
>  	struct drm_encoder *encoder;
>  	struct drm_device *ddev;
>  	struct dss_module_power *mp = &dpu_kms->mp;
> +	int i;
>  
>  	ddev = dpu_kms->dev;
> +
> +	/* Min vote of BW is required before turning on AXI clk */
> +	for (i = 0; i < dpu_kms->num_paths; i++)
> +		icc_set_bw(dpu_kms->path[i], 0,
> +			dpu_kms->catalog->perf.min_dram_ib);

Bps_to_icc() ?

Thanks,
Georgi