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From:   Anson Huang <anson.huang@nxp.com>
To:     Marco Felsch <m.felsch@pengutronix.de>
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        "sboyd@kernel.org" <sboyd@kernel.org>,
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        "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
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        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [PATCH 1/5] dt-bindings: clock: Convert i.MX6Q clock to
 json-schema
Thread-Topic: [PATCH 1/5] dt-bindings: clock: Convert i.MX6Q clock to
 json-schema
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Date:   Thu, 16 Apr 2020 06:16:23 +0000
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Hi, Marco

> Subject: Re: [PATCH 1/5] dt-bindings: clock: Convert i.MX6Q clock to
> json-schema
>=20
> Hi Anson,
>=20
> thanks for the patch. I have two questions please see inline which applie=
s to all
> patches.
>=20
> On 20-04-16 12:26, Anson Huang wrote:
>=20
> ...
>=20
> > diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml
> > b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml
> > new file mode 100644
> > index 0000000..084d4f0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml
> > @@ -0,0 +1,69 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdev=
i
> >
> +cetree.org%2Fschemas%2Fclock%2Fimx6q-clock.yaml%23&amp;data=3D02%7C
> 01%7
> >
> +Canson.huang%40nxp.com%7Cf07db2c34e834628725208d7e1c63083%7C6
> 86ea1d3b
> >
> +c2b4c6fa92cd99c5c301635%7C0%7C0%7C637226113645218967&amp;sdat
> a=3DsBVaIF
> > +hEoFSfaot7P%2Bjcbu6gnAlaB%2BDeEUqn3sv3%2BA8%3D&amp;reserved=3D0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdev=
i
> >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=3D02%7C01%7Cans
> on.hua
> >
> +ng%40nxp.com%7Cf07db2c34e834628725208d7e1c63083%7C686ea1d3bc2
> b4c6fa92
> >
> +cd99c5c301635%7C0%7C0%7C637226113645218967&amp;sdata=3DKLIuh1sJ
> 2OQDp%2B
> > +zSncLn87ziXGb85rwJFu2NnLgvxGI%3D&amp;reserved=3D0
> > +
> > +title: Clock bindings for Freescale i.MX6 Quad
> > +
> > +maintainers:
> > +  - Anson Huang <Anson.Huang@nxp.com>
> > +
> > +properties:
> > +  compatible:
> > +    const: fsl,imx6q-ccm
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    minItems: 1
>=20
> Why 1 and not 2? The RM describes that the ccm has 2 interrupts.

This is a typo, since we all use 2 interrupts for ccm, I will change them t=
o ONLY 2;

>=20
> > +    maxItems: 2
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: 24m osc
> > +      - description: 32k osc
> > +      - description: ckih1 clock input
> > +      - description: anaclk1 clock input
> > +      - description: anaclk2 clock input
> > +
> > +  clock-names:
> > +    items:
> > +      - const: osc
> > +      - const: ckil
> > +      - const: ckih1
> > +      - const: anaclk1
> > +      - const: anaclk2
> > +
> > +  fsl,pmic-stby-poweroff:
> > +    $ref: /schemas/types.yaml#/definitions/flag
> > +    description: |
> > +      Use this property if the SoC should be powered off by external p=
ower
> > +      management IC (PMIC) triggered via PMIC_STBY_REQ signal.
> > +      Boards that are designed to initiate poweroff on PMIC_ON_REQ
> signal should
> > +      be using "syscon-poweroff" driver instead.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - '#clock-cells'
> > +
> > +examples:
> > +  # Clock Control Module node:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +    clks: clock-controller@20c4000 {
> > +        compatible =3D "fsl,imx6q-ccm";
> > +        reg =3D <0x020c4000 0x4000>;
> > +        interrupts =3D <0 87 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <0 88 IRQ_TYPE_LEVEL_HIGH>;
> > +        #clock-cells =3D <1>;
> > +    };
> > +
> > +...
>=20
> Why these '...' here?

I will remove it

Thanks,
Anson

>=20
> Regards,
>   Marco
>=20
> > --
> > 2.7.4