Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp972333ybz; Wed, 15 Apr 2020 23:49:39 -0700 (PDT) X-Google-Smtp-Source: APiQypIon3ju6MTPXHMx4AnQi5VbzERTrdiPEpPX9iRJRu0vs6BF5NqXiXy1cLCE179TYiKk33hv X-Received: by 2002:a50:9e29:: with SMTP id z38mr29046085ede.345.1587019779527; Wed, 15 Apr 2020 23:49:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587019779; cv=none; d=google.com; s=arc-20160816; b=E6X3Mrjj47j9mXTy5EJzuieKCozwkItfi4NodaVz3K9ttxwf3U6JXerdu6v7JgwWou NWEQeHhJJLW/mubQuMPMVU40yWO48Zki09BdDyoZek7w9Zk3b4+zD847LzAZ4HLgXgP3 CuD0BHeAVC62HeUHZdnW11mfCdG8yOB9X6DzgSWRnDMx8A3RuvDbI9zdWU4aPUqPcANU nKU1cO97jvB0bmkttPLKGbEKXo7k95iHhTA2bZZoGA3XR/zFXSMUdw0VenqoOSHJCbTH WOrgnealIgbsttwZ61WTHdNSipi2EoCSxZh0HZhW/uJ1Raxyh5GK+3ZIlQyZbKSJyWP1 aSZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=RRNPZJhOtJrOZ+YR9+I+9OozSDgQrKYCYoSSVzCucuU=; b=IDe5smp0GI8GZv9mmT+Mzwc1LSO6xmTyBlAsvTuin/OBYzQu0Hw7c0Rb1iJSGcD2kF 4RpwSFl7baItUoq+vZgV09H7DB+YjQZS7v6d17SaWwk0jkdxeK5Nwyin8MVbd8gTLMYJ hqbybwHU4uXdYqF8cxVepCa7Ezp0hKPRczhdfjeUhKoqjcGuXto+AJiid+TuWkQVdROY L464BP/ClsA9Po8dxDki8SFTJRWxcviEOx9fU69Ch4YEvv5AdaCkhXhG9egP5WdeajQk TNZBu5FxF+jR/eeFbECOkPt8Fb7A3/1E+my5vBA47TTJU8OSFrislaDS7l30t16OUrlL ax6Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cm2si10789399edb.22.2020.04.15.23.49.16; Wed, 15 Apr 2020 23:49:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408482AbgDPGr5 (ORCPT + 99 others); Thu, 16 Apr 2020 02:47:57 -0400 Received: from inva020.nxp.com ([92.121.34.13]:54454 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2408188AbgDPGri (ORCPT ); Thu, 16 Apr 2020 02:47:38 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id D8B181A0C1F; Thu, 16 Apr 2020 08:47:30 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B6B081A0C1D; Thu, 16 Apr 2020 08:47:25 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 81D84402A8; Thu, 16 Apr 2020 14:47:19 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Linux-imx@nxp.com Subject: [PATCH V2 1/5] dt-bindings: clock: Convert i.MX6Q clock to json-schema Date: Thu, 16 Apr 2020 14:39:14 +0800 Message-Id: <1587019158-12143-1-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the i.MX6Q clock binding to DT schema format using json-schema. Signed-off-by: Anson Huang --- Changes since V1: - remove minItem of interrupts; - remove '...' at the end of file --- .../devicetree/bindings/clock/imx6q-clock.txt | 41 -------------- .../devicetree/bindings/clock/imx6q-clock.yaml | 66 ++++++++++++++++++++++ 2 files changed, 66 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt deleted file mode 100644 index 13d36d4..0000000 --- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt +++ /dev/null @@ -1,41 +0,0 @@ -* Clock bindings for Freescale i.MX6 Quad - -Required properties: -- compatible: Should be "fsl,imx6q-ccm" -- reg: Address and length of the register set -- interrupts: Should contain CCM interrupt -- #clock-cells: Should be <1> - -Optional properties: -- fsl,pmic-stby-poweroff: Configure CCM to assert PMIC_STBY_REQ signal - on power off. - Use this property if the SoC should be powered off by external power - management IC (PMIC) triggered via PMIC_STBY_REQ signal. - Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should - be using "syscon-poweroff" driver instead. -- clocks: list of clock specifiers, must contain an entry for each entry - in clock-names -- clock-names: valid names are "osc", "ckil", "ckih1", "anaclk1" and "anaclk2" - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6qdl-clock.h -for the full list of i.MX6 Quad and DualLite clock IDs. - -Examples: - -#include - -clks: ccm@20c4000 { - compatible = "fsl,imx6q-ccm"; - reg = <0x020c4000 0x4000>; - interrupts = <0 87 0x04 0 88 0x04>; - #clock-cells = <1>; -}; - -uart1: serial@2020000 { - compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x02020000 0x4000>; - interrupts = <0 26 0x04>; - clocks = <&clks IMX6QDL_CLK_UART_IPG>, <&clks IMX6QDL_CLK_UART_SERIAL>; - clock-names = "ipg", "per"; -}; diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml new file mode 100644 index 0000000..1c6e600 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx6q-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock bindings for Freescale i.MX6 Quad + +maintainers: + - Anson Huang + +properties: + compatible: + const: fsl,imx6q-ccm + + reg: + maxItems: 1 + + interrupts: + maxItems: 2 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: 24m osc + - description: 32k osc + - description: ckih1 clock input + - description: anaclk1 clock input + - description: anaclk2 clock input + + clock-names: + items: + - const: osc + - const: ckil + - const: ckih1 + - const: anaclk1 + - const: anaclk2 + + fsl,pmic-stby-poweroff: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Use this property if the SoC should be powered off by external power + management IC (PMIC) triggered via PMIC_STBY_REQ signal. + Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should + be using "syscon-poweroff" driver instead. + +required: + - compatible + - reg + - interrupts + - '#clock-cells' + +examples: + # Clock Control Module node: + - | + #include + + clks: clock-controller@20c4000 { + compatible = "fsl,imx6q-ccm"; + reg = <0x020c4000 0x4000>; + interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, + <0 88 IRQ_TYPE_LEVEL_HIGH>; + #clock-cells = <1>; + }; -- 2.7.4