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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Fri, 17 Apr 2020 13:21:47 +0300
Message-ID: <CAHp75VegoXJmi1rDg_-ePKqoo69Jdt7NBchCTE=bPAdJqrgYQQ@mail.gmail.com>
Subject: Re: [PATCH V2 3/3] iio: adc: Add support for PMIC7 ADC
To:     Jishnu Prakash <jprakash@codeaurora.org>
Cc:     agross@kernel.org, Bjorn Andersson <bjorn.andersson@linaro.org>,
        devicetree <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
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        Linus Walleij <linus.walleij@linaro.org>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        smohanad@codeaurora.org, kgunda@codeaurora.org,
        aghayal@codeaurora.org, Jonathan Cameron <jic23@kernel.org>,
        Hartmut Knaack <knaack.h@gmx.de>,
        Lars-Peter Clausen <lars@metafoo.de>,
        Peter Meerwald-Stadler <pmeerw@pmeerw.net>,
        linux-arm-msm@vger.kernel.org,
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        linux-arm-msm-owner@vger.kernel.org
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On Thu, Apr 16, 2020 at 1:48 AM Jishnu Prakash <jprakash@codeaurora.org> wrote:
>
> The ADC architecture on PMIC7 is changed as compared to PMIC5. The
> major change from PMIC5 is that all SW communication to ADC goes through
> PMK8350, which communicates with other PMICs through PBS when the ADC
> on PMK8350 works in master mode. The SID register is used to identify the
> PMICs with which the PBS needs to communicate. Add support for the same.

Please, split pr_*() -> dev_*() to separate patch. Also think about
other logical pieces you may split out.

...

> +static const struct adc5_data adc7_data_pmic;

Global variable? Hmm...

...

> +       int ret;
> +       u8 conv_req = 0, buf[4];
> +
> +       ret = adc5_masked_write(adc, ADC_APP_SID, ADC_APP_SID_MASK, prop->sid);
> +       if (ret)
> +               return ret;
> +
> +       ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));

> +       if (ret < 0)

Does  > 0 have a meaning?

> +               return ret;
> +
> +       /* Digital param selection */
> +       adc5_update_dig_param(adc, prop, &buf[0]);
> +
> +       /* Update fast average sample value */

> +       buf[1] &= 0xff & ~ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK;

What the point of 0xff & part?

> +       buf[1] |= prop->avg_samples;
> +
> +       /* Select ADC channel */
> +       buf[2] = prop->channel;
> +
> +       /* Select HW settle delay for channel */
> +       buf[3] &= 0xff & ~ADC5_USR_HW_SETTLE_DELAY_MASK;

Ditto.

> +       buf[3] |= prop->hw_settle_time;

...

> +static int adc7_do_conversion(struct adc5_chip *adc,
> +                       struct adc5_channel_prop *prop,
> +                       struct iio_chan_spec const *chan,
> +                       u16 *data_volt, u16 *data_cur)
> +{
> +       int ret;

> +       u8 status = 0;

Redundant assignment.

> +       mutex_lock(&adc->lock);
> +
> +       ret = adc7_configure(adc, prop);
> +       if (ret) {
> +               dev_err(adc->dev, "ADC configure failed with %d\n", ret);
> +               goto unlock;
> +       }
> +
> +       /* No support for polling mode at present*/

Missed space

> +       wait_for_completion_timeout(&adc->complete, ADC7_CONV_TIMEOUT);
> +
> +       ret = adc5_read(adc, ADC5_USR_STATUS1, &status, 1);

> +       if (ret < 0)

Remove all ' < 0' where it is not needed.

> +               goto unlock;
> +
> +       if (status & ADC5_USR_STATUS1_CONV_FAULT) {
> +               dev_err(adc->dev, "Unexpected conversion fault\n");
> +               ret = -EIO;
> +               goto unlock;
> +       }
> +
> +       ret = adc5_read_voltage_data(adc, data_volt);
> +
> +unlock:
> +       mutex_unlock(&adc->lock);

...

> +       for (i = 0; i < adc->nchannels; i++) {

> +               v_channel = (adc->chan_props[i].sid << ADC_CHANNEL_OFFSET |
> +                       adc->chan_props[i].channel);

Too many parentheses or they are in a wrong position. I don't remember
operator precedence by heart.

> +               if (v_channel == iiospec->args[0])
> +                       return i;
> +       }

...

> +       /*
> +        * Value read from "reg" is virtual channel number
> +        * virtual channel number = (sid << 8 | channel number).

Too many parentheses. And perhaps formulas better to have on a separate line.

> +        */

...

> +static const struct vadc_map_pt adcmap7_100k[] = {
> +       { 4250657, -40960 },
> +       { 3962085, -39936 },

> +       { 419448, -3072 },
> +       { 396851, -2048 },
> +       { 375597, -1024 },
> +       { 355598, 0 },
> +       { 336775, 1024 },
> +       { 319052, 2048 },
> +       { 302359, 3072 },

> +       { 2560, 128000 },
> +       { 2489, 129024 },
> +       { 2420, 130048 }
> +};

I'm wondering why you have second column here? Can't you derive it
from index? Seems to me pretty easy calculus.

...

> +       int ret, result = 0;

Redundant assignment.

> +       if (adc_code >= RATIO_MAX_ADC7)
> +               return -EINVAL;
> +
> +       /* (ADC code * R_PULLUP (100Kohm)) / (full_scale_code - ADC code)*/
> +       resistance *= R_PU_100K;
> +       resistance = div64_s64(resistance, RATIO_MAX_ADC7 - adc_code);
> +
> +       ret = qcom_vadc_map_voltage_temp(adcmap7_100k,
> +                                ARRAY_SIZE(adcmap7_100k),
> +                                resistance, &result);
> +       if (ret)
> +               return ret;
> +
> +       *result_mdec = result;

...

> +       for (i = 0; i < ARRAY_SIZE(adcmap7_die_temp); i++)
> +               if (adcmap7_die_temp[i].x > voltage)
> +                       break;
> +

> +       if (i == 0) {
> +               *result_mdec = DIE_TEMP_ADC7_SCALE_1;
> +       } else if (i == ARRAY_SIZE(adcmap7_die_temp)) {
> +               *result_mdec = DIE_TEMP_ADC7_MAX;

I think you can done these checks before loop, and return immediately.

> +       } else {
> +               vtemp0 = adcmap7_die_temp[i - 1].x;
> +               voltage = voltage - vtemp0;
> +               temp = div64_s64(voltage * DIE_TEMP_ADC7_SCALE_FACTOR,
> +                       adcmap7_die_temp[i - 1].y);
> +               temp += DIE_TEMP_ADC7_SCALE_1 + (DIE_TEMP_ADC7_SCALE_2 * (i - 1));
> +               *result_mdec = temp;
> +       }

-- 
With Best Regards,
Andy Shevchenko