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[23.128.96.18]) by mx.google.com with ESMTP id k1si13917858eds.302.2020.04.17.06.35.30; Fri, 17 Apr 2020 06:35:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730708AbgDQNdk (ORCPT + 99 others); Fri, 17 Apr 2020 09:33:40 -0400 Received: from mga11.intel.com ([192.55.52.93]:20698 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730610AbgDQNdk (ORCPT ); Fri, 17 Apr 2020 09:33:40 -0400 IronPort-SDR: A8sdd/x7//Itl5n6PmufCSO/Ey5/rtCdYA7NYVQeOsysuu5xn+Uxgj+s2WzR9TrKMJfTVT0dxb txo68Zvvdc4w== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2020 06:33:40 -0700 IronPort-SDR: 8i6j3nEPlk0bXHPhT0/jUcxr4Mtp6sg0LT4GqD1WUm4FPS4NvEm4vaZxzy3YmR3OVYwB2shxCB 7MyOgCC+RC9w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,395,1580803200"; d="scan'208";a="278380256" Received: from dsbrown-mobl.amr.corp.intel.com (HELO [10.251.128.242]) ([10.251.128.242]) by fmsmga004.fm.intel.com with ESMTP; 17 Apr 2020 06:33:38 -0700 Subject: Re: [PATCH v2] ASoC: bdw-rt5650: remove 3-channel capture support To: Cezary Rojewski , "Lu, Brent" , "alsa-devel@alsa-project.org" Cc: Guennadi Liakhovetski , Kuninori Morimoto , Jie Yang , "linux-kernel@vger.kernel.org" , Takashi Iwai , Liam Girdwood , Ben Zhang , "Chiang, Mac" , Mark Brown References: <1586766533-18557-1-git-send-email-brent.lu@intel.com> <9a484795-ea4a-e559-4ea9-3de24417ec9b@linux.intel.com> <4b9455cb-d0d2-f5d8-f04c-df6e5abb4441@linux.intel.com> <95d0a64e-d2e9-7117-75c5-6c68b1426f93@intel.com> From: Pierre-Louis Bossart Message-ID: Date: Fri, 17 Apr 2020 08:33:38 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <95d0a64e-d2e9-7117-75c5-6c68b1426f93@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/17/20 2:59 AM, Cezary Rojewski wrote: > On 2020-04-17 03:32, Lu, Brent wrote: >>> >>> It seems like a generic problem on all Broadwell devices so let's >>> solve with >>> one a single patchset. >>> >>> Shouldn't we just add the 2ch constraints for broadwell.c and >>> bdw-rt5677.c, >>> and the 2 or 4ch constraint for bdw-rt5650.c? Would this work for you? >>> >>> Thanks >>> -Pierre >> >> Hi Pierre, >> >> Are you saying submitting a new patch to add constraints to all three >> broadwell.c, >> bdw-rt5650.c, and bdw-rt5677.c? >> >> >> Regards, >> Brent >> > > What Pierre suggested is that you submit a series of patches instead - > one for each of BDW machine boards. If the same problem exists on all of > them, there is no reason to left other boards unattended. Yes, a series of 3 patches with the same code pattern, the only variation being 4 ch allowed for bdw-rt5650.c in addition to the default 2ch for all 3 boards. Thanks -Pierre