Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp1748762ybz; Sat, 18 Apr 2020 07:42:33 -0700 (PDT) X-Google-Smtp-Source: APiQypLbmaoMl2B0Nz10gUs71aj9jSFlsRGhUzUNQJcWZypK9B1L6kaSJ65Yigey1xgsiLeux30r X-Received: by 2002:a17:906:70f:: with SMTP id y15mr8180978ejb.276.1587220953045; Sat, 18 Apr 2020 07:42:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587220953; cv=none; d=google.com; s=arc-20160816; b=w4w3Eb1SCCyUkIQWu5dwqXQJ40swLDuP4aLYkl08NZrRFONmYB25U1aGI+S21Ibxtb OTMCBElY0VYMhZyyJbUFwOIwpdfAJgtzV647NhnFTNHAcOv3+pS01eCAAWQlrDLOzVJQ yDxtmQTi8UwotvcPs0LKYgEhAgvk82LCjae/cCcNlnvNwL0MgfZPDYlG6LUXZReAoRf8 pQbacpxgJkq4BSGpZIXt0PEDMNFjsDtdS1hPCdIaKcnSQIS7wj/gweHmRYp9GTAjcczG bWBSfNxasqJ0XKnoUKXAURQWPf8swC1nA2nO4tYf3yff+SbQnGXmZniK/4hbPt/B5qQU CQqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=SRHkYMcH75DNPmwIOV2Y4tGE5tZToga1Pkb/5OZAd40=; b=VIHfW7uKj82812hwslPre9A/SqIWqqiSIVurWRknXGEHh9NMr6pbH5OcJr5yS/4A0B ZJTvlrzXYyW8L7URqPDQfMk7oIuALUIJUS7sBLUXMosWty7OPlDPrUF0OapMLTlTBKCw 7ZCrTTJ6pnzU3I1KS867/qlKnE2pTQuE1vfBFzviDPSq/bJ2jGgvmBRQeyhmH6BlHGd+ DQrq+40hCg6JaT2ZMTIjewms+9PyMwssIek483l28Fv98EmXkwRQIyr3MtxcDEfCmKFe 9+NksBe689AY5NF4w5xy4pdNMbg9HOw/B+APLQUpN0PReiqAZ/01X9XdyKLYKdN+AzY6 xN9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=F66kE3W8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h21si2584710edj.79.2020.04.18.07.42.10; Sat, 18 Apr 2020 07:42:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=F66kE3W8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726728AbgDROku (ORCPT + 99 others); Sat, 18 Apr 2020 10:40:50 -0400 Received: from mail.kernel.org ([198.145.29.99]:49262 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725903AbgDROku (ORCPT ); Sat, 18 Apr 2020 10:40:50 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0554F21D7E; Sat, 18 Apr 2020 14:40:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587220849; bh=l7ekFKtaYoWG4FL2fqCcuTI64us+m53O/B1Hpmin2sw=; h=From:To:Cc:Subject:Date:From; b=F66kE3W8U4Sfk9/TYCfvB2Yvv7H7pC8U35U+dTBFOil1ljUSf6qBQtPLwkrgzbdY+ BmV3Sb1MP0/AMSNfz1LtoUKArIRLICyZaFvc4glZxoqr9o3rysBKU8ZwDz574m1Bdr mGfhH/Oj1wge+2mRC2EZAcRDmfpKJK7QLaRop4pI= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Adrian Huang , Joerg Roedel , Sasha Levin , iommu@lists.linux-foundation.org Subject: [PATCH AUTOSEL 5.4 01/78] iommu/amd: Fix the configuration of GCR3 table root pointer Date: Sat, 18 Apr 2020 10:39:30 -0400 Message-Id: <20200418144047.9013-1-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Adrian Huang [ Upstream commit c20f36534666e37858a14e591114d93cc1be0d34 ] The SPA of the GCR3 table root pointer[51:31] masks 20 bits. However, this requires 21 bits (Please see the AMD IOMMU specification). This leads to the potential failure when the bit 51 of SPA of the GCR3 table root pointer is 1'. Signed-off-by: Adrian Huang Fixes: 52815b75682e2 ("iommu/amd: Add support for IOMMUv2 domain mode") Signed-off-by: Joerg Roedel Signed-off-by: Sasha Levin --- drivers/iommu/amd_iommu_types.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index daeabd98c60e2..0679896b9e2e1 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h @@ -348,7 +348,7 @@ #define DTE_GCR3_VAL_A(x) (((x) >> 12) & 0x00007ULL) #define DTE_GCR3_VAL_B(x) (((x) >> 15) & 0x0ffffULL) -#define DTE_GCR3_VAL_C(x) (((x) >> 31) & 0xfffffULL) +#define DTE_GCR3_VAL_C(x) (((x) >> 31) & 0x1fffffULL) #define DTE_GCR3_INDEX_A 0 #define DTE_GCR3_INDEX_B 1 -- 2.20.1