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[68.111.84.250]) by smtp.gmail.com with ESMTPSA id l7sm25358368pfl.171.2020.04.19.12.44.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 19 Apr 2020 12:44:14 -0700 (PDT) Subject: Re: [Patch v2 3/9] spi: bcm-qspi: Handle lack of MSPI_REV offset To: Kamal Dasu , bcm-kernel-feedback-list@broadcom.com, Mark Brown Cc: Florian Fainelli , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org References: <20200419192339.32023-1-kdasu.kdev@gmail.com> <20200419192339.32023-4-kdasu.kdev@gmail.com> From: Florian Fainelli Message-ID: <63176468-53b6-c11a-9e33-2ca9dd06f7a3@gmail.com> Date: Sun, 19 Apr 2020 12:44:13 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Firefox/68.0 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20200419192339.32023-4-kdasu.kdev@gmail.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kamal, On 4/19/2020 12:23 PM, Kamal Dasu wrote: > Older MIPS chips have a QSPI/MSPI controller that does not have the > MSPI_REV offset, reading from that offset will cause a bus error. Match > their compatible string and do not perform a read from that register in > that case. > > Signed-off-by: Florian Fainelli > Signed-off-by: Kamal Dasu This patch should also have a From: that is from me. -- Florian