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Subject: Re: [PATCH v2 2/2] mtd: rawnand: Add NAND controller support on Intel
 LGM SoC
To:     Boris Brezillon <boris.brezillon@collabora.com>
Cc:     linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
        devicetree@vger.kernel.org, miquel.raynal@bootlin.com,
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        hauke.mehrtens@intel.com, andriy.shevchenko@intel.com,
        qi-ming.wu@intel.com, cheol.yong.kim@intel.com
References: <20200417082147.43384-1-vadivel.muruganx.ramuthevar@linux.intel.com>
 <20200417082147.43384-3-vadivel.muruganx.ramuthevar@linux.intel.com>
 <20200420102959.2659774d@collabora.com>
From:   "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@linux.intel.com>
Message-ID: <85f510a8-59a8-0ac4-23bf-86c5c2b85a96@linux.intel.com>
Date:   Mon, 20 Apr 2020 17:15:16 +0800
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Hi Boris,
     Thank you very much for the review comments and your time...

On 20/4/2020 4:29 pm, Boris Brezillon wrote:
> On Fri, 17 Apr 2020 16:21:47 +0800
> "Ramuthevar,Vadivel MuruganX"
> <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
>
>> +
>> +	res = devm_platform_ioremap_resource_byname(pdev, lgm_host->cs_name);
>> +	lgm_host->nandaddr_va = res;
>> +	nandaddr_pa = res->start;
>> +	if (IS_ERR(lgm_host->nandaddr_va))
>> +		return PTR_ERR(lgm_host->nandaddr_va);
> Hm, I didn't realize you needed the physical address for DMA transfers.
> Just use platform_get_resource_by_name()+devm_ioremap_resource() in
> that case.
>
Yes, you are right, needed the physical address for DMA transfers.
>> +
>> +	writel(LGM_BUSCON_CMULT_V4 | LGM_BUSCON_RECOVC(1) |
>> +	       LGM_BUSCON_HOLDC(1) | LGM_BUSCON_WAITRDC(2) |
>> +	       LGM_BUSCON_WAITWRC(2) | LGM_BUSCON_BCGEN_CS | LGM_BUSCON_ALEC |
>> +	       LGM_BUSCON_SETUP_EN, lgm_host->lgm_va + LGM_BUSCON(cs));
> I'm sure some the timings you hardcode here can be extracted from the
> NAND timings. Can you see if you can implement ->setup_data_interface()
> instead.

Yes, I have seen few of the drivers implemented 
->setup_data_interface(), Noted.

Regards
Vadivel