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Date:   Mon, 20 Apr 2020 14:59:19 +0200
From:   Maxime Ripard <maxime@cerno.tech>
To:     Priit Laes <plaes@plaes.org>
Cc:     Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-sunxi@googlegroups.com
Subject: Re: [PATCH 4/4] ARM: dts: sun7i: Use syscon-based implementation for
 gmac
Message-ID: <20200420125919.3bqosps7nzwvmasn@gilmour.lan>
References: <20200417221730.555954-1-plaes@plaes.org>
 <20200417221730.555954-5-plaes@plaes.org>
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On Sat, Apr 18, 2020 at 01:17:30AM +0300, Priit Laes wrote:
> Use syscon-based approach to access gmac clock configuration
> register, instead of relying on a custom clock driver.
>=20
> As a bonus, we can now drop the custom clock implementation
> and dummy clocks making sun7i fully CCU-compatible.
>=20
> Signed-off-by: Priit Laes <plaes@plaes.org>
> ---
>  arch/arm/boot/dts/sun7i-a20.dtsi | 36 +++-----------------------------
>  1 file changed, 3 insertions(+), 33 deletions(-)
>=20
> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a=
20.dtsi
> index ffe1d10a1a84..750962a94fad 100644
> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> @@ -219,37 +219,6 @@ osc32k: clk-32k {
>  			clock-frequency =3D <32768>;
>  			clock-output-names =3D "osc32k";
>  		};
> -
> -		/*
> -		 * The following two are dummy clocks, placeholders
> -		 * used in the gmac_tx clock. The gmac driver will
> -		 * choose one parent depending on the PHY interface
> -		 * mode, using clk_set_rate auto-reparenting.
> -		 *
> -		 * The actual TX clock rate is not controlled by the
> -		 * gmac_tx clock.
> -		 */
> -		mii_phy_tx_clk: clk-mii-phy-tx {
> -			#clock-cells =3D <0>;
> -			compatible =3D "fixed-clock";
> -			clock-frequency =3D <25000000>;
> -			clock-output-names =3D "mii_phy_tx";
> -		};
> -
> -		gmac_int_tx_clk: clk-gmac-int-tx {
> -			#clock-cells =3D <0>;
> -			compatible =3D "fixed-clock";
> -			clock-frequency =3D <125000000>;
> -			clock-output-names =3D "gmac_int_tx";
> -		};
> -
> -		gmac_tx_clk: clk@1c20164 {
> -			#clock-cells =3D <0>;
> -			compatible =3D "allwinner,sun7i-a20-gmac-clk";
> -			reg =3D <0x01c20164 0x4>;
> -			clocks =3D <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
> -			clock-output-names =3D "gmac_tx";
> -		};
>  	};
> =20
> =20
> @@ -1511,11 +1480,12 @@ mali: gpu@1c40000 {
> =20
>  		gmac: ethernet@1c50000 {
>  			compatible =3D "allwinner,sun7i-a20-gmac";
> +			syscon =3D <&ccu>;
>  			reg =3D <0x01c50000 0x10000>;
>  			interrupts =3D <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names =3D "macirq";
> -			clocks =3D <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
> -			clock-names =3D "stmmaceth", "allwinner_gmac_tx";
> +			clocks =3D <&ccu CLK_AHB_GMAC>;
> +			clock-names =3D "stmmaceth";

I guess you also need to update the binding so that it considers it valid?

Maxime

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