Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp3747889ybz; Mon, 20 Apr 2020 08:44:42 -0700 (PDT) X-Google-Smtp-Source: APiQypLxC2ALS3FYhTu0GOoWMTMyEeY2f862K011B6qsk32u31UKT+UW0u3D63+Ga242nwhynxiA X-Received: by 2002:a05:6402:b2a:: with SMTP id bo10mr6157782edb.366.1587397482136; Mon, 20 Apr 2020 08:44:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587397482; cv=none; d=google.com; s=arc-20160816; b=neJfPIRfNnkA/2USDJZuZt7kpSbcO2xLViD0ZT7ZKk/As/EyiJiImJLRlp6WRxcPDK ecnZR3pqQEXOcbeyJtxP7dxIMlNZ3Y6PF31+5MCXkjsIvtzwDyXEh1X8jUZYsAH57klV gSBHO/kmc0CibEY2pn0v2V8jwNa8g/PW8Zlw93Gi8zSwMUVgqma/4o+CjyYec9XbsaAf RD7+JwQuVtoeH0+94haibJ2EZL5i0pkEldDUkXvWkXmO3aAGXeHthus3gyBy1tZHm6s+ ScOSE69Z9ysLmBOBHOFWEbtTgWSZCy0M9R1lHOBln850qhtJJQ2aQtVyR57QI+fLw5DF cfzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :ironport-sdr:ironport-sdr; bh=o93Z4PPcZUq52HvcCGunGucdj1Oftg5d/pHLRoR5t4k=; b=BbbcgLI22YgRqW0FtOFX275KkKBAjaktaYOODtb8psp9qmPjWjr/lp159buoyn/GHz ir1vG0xyVL5EAFME/dZGrtVUAl8EZdoGYbLq8hv1wXe8jIgoqgWa3efIvALm0sqQPh6d EbVr+bNVjtPTIaS5eUqOZkti0GcaerJorvDpBel3vcqiI3pdCeQgONnPOoEjyqnwq3n2 3Z6BCtYY23av+eAGVbVmc2Ux3t9Leeq6XF3RDWvolUjOCM/8lEHBpqpuS+xgQx8NRZD1 wYEHPR1vmJPLRB8IjV6BYMOT5w91egM+a2bd9NTNuQXmr1FSoWiDy6fUesHQNRLFtdYz xW7A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y9si764715edr.281.2020.04.20.08.44.19; Mon, 20 Apr 2020 08:44:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728687AbgDTPm5 (ORCPT + 99 others); Mon, 20 Apr 2020 11:42:57 -0400 Received: from mga11.intel.com ([192.55.52.93]:12546 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725989AbgDTPm5 (ORCPT ); Mon, 20 Apr 2020 11:42:57 -0400 IronPort-SDR: QwwSCWwKDAAD4D7LgvpIhnin8VGOXGEYc2FYuCLah3GoBE7o4zmbHshtTNDvfg9JsoGbU/naw0 ZUqNwJhzQpnQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2020 08:42:56 -0700 IronPort-SDR: zDnVUSAMZOui+rWElU7lO4pGPvan++knR7cSug/ANI+Y3Q6xiywjuTLcnLkdI6/uvAk8CE98hF 138tZQywGRxw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,407,1580803200"; d="scan'208";a="429169845" Received: from unknown (HELO climb.png.intel.com) ([10.221.118.165]) by orsmga005.jf.intel.com with ESMTP; 20 Apr 2020 08:42:53 -0700 From: Voon Weifeng To: "David S . Miller" , Maxime Coquelin Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Jose Abreu , Giuseppe Cavallaro , Andrew Lunn , Alexandre Torgue , Ong Boon Leong , Voon Weifeng Subject: [net-next,v1, 0/1] Enable SERDES power up/down Date: Mon, 20 Apr 2020 23:42:51 +0800 Message-Id: <20200420154252.8000-1-weifeng.voon@intel.com> X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch is to enable Intel SERDES power up/down sequence. The SERDES converts 8/10 bits data to SGMII signal. 1.Introduced 2 new BSP callbacks ->serdes_powerup() and ->serdes_powerdown(). 2.The 2 new BSP callbacks is called in stmmac_dvr_probe() and stmmac_resume() for SERDER powerup; stmmac_dvr_remove() and stmmac_suspend() for SERDES powerdown. 3.Intel platform specific SERDES powerup and powerdown sequence functions are added in dwmac-intel.c. 4.Since configuring the SERDES is through mdio, mdio communication is needed to be up before powerup sequence. As for SERDES power-down sequence, it must be configured after all dma stop and before unregister the mdio bus. 5.New file dwmac-intel.h is created for register definition. Voon Weifeng (1): net: stmmac: Enable SERDES power up/down sequence .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 189 ++++++++++++++++++ .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 23 +++ .../net/ethernet/stmicro/stmmac/stmmac_main.c | 23 +++ include/linux/stmmac.h | 2 + 4 files changed, 237 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h -- 2.17.1