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Date:   Mon, 20 Apr 2020 16:27:51 -0500
From:   Rob Herring <robh@kernel.org>
To:     Anson Huang <Anson.Huang@nxp.com>
Cc:     wim@linux-watchdog.org, linux@roeck-us.net, shawnguo@kernel.org,
        s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com,
        linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Linux-imx@nxp.com
Subject: Re: [PATCH V2 2/2] dt-bindings: watchdog: Convert i.MX7ULP to
 json-schema
Message-ID: <20200420212751.GA7615@bogus>
References: <1586911211-1141-1-git-send-email-Anson.Huang@nxp.com>
 <1586911211-1141-2-git-send-email-Anson.Huang@nxp.com>
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On Wed, Apr 15, 2020 at 08:40:11AM +0800, Anson Huang wrote:
> Convert the i.MX7ULP watchdog binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V1:
> 	- Add 'timeout-sec' property to avoid build error.
> ---
>  .../bindings/watchdog/fsl-imx7ulp-wdt.txt          | 22 --------
>  .../bindings/watchdog/fsl-imx7ulp-wdt.yaml         | 65 ++++++++++++++++++++++
>  2 files changed, 65 insertions(+), 22 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
>  create mode 100644 Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
> deleted file mode 100644
> index f902508..0000000
> --- a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
> +++ /dev/null
> @@ -1,22 +0,0 @@
> -* Freescale i.MX7ULP Watchdog Timer (WDT) Controller
> -
> -Required properties:
> -- compatible : Should be "fsl,imx7ulp-wdt"
> -- reg : Should contain WDT registers location and length
> -- interrupts : Should contain WDT interrupt
> -- clocks: Should contain a phandle pointing to the gated peripheral clock.
> -
> -Optional properties:
> -- timeout-sec : Contains the watchdog timeout in seconds
> -
> -Examples:
> -
> -wdog1: watchdog@403d0000 {
> -	compatible = "fsl,imx7ulp-wdt";
> -	reg = <0x403d0000 0x10000>;
> -	interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> -	clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> -	assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> -	assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
> -	timeout-sec = <40>;
> -};
> diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
> new file mode 100644
> index 0000000..86b4d93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
> +
> +maintainers:
> +  - Anson Huang <Anson.Huang@nxp.com>
> +
> +allOf:
> +  - $ref: "watchdog.yaml#"
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx7ulp-wdt
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    description: |
> +      Watchdog's clock source.
> +    maxItems: 1
> +
> +  assigned-clocks:
> +    maxItems: 1
> +
> +  assigned-clocks-parents:
> +    maxItems: 1
> +
> +  timeout-sec:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: |
> +      Contains the watchdog timeout in seconds.

This already has a definition in watchdog.yaml, just need:

timeout-sec: true

> +
> +required:
> +  - compatible
> +  - interrupts
> +  - reg
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/imx7ulp-clock.h>
> +
> +    wdog1: watchdog@403d0000 {
> +        compatible = "fsl,imx7ulp-wdt";
> +        reg = <0x403d0000 0x10000>;
> +        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> +        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> +        assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
> +        timeout-sec = <40>;
> +    };
> +
> +...
> -- 
> 2.7.4
>