Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp4503427ybz; Tue, 21 Apr 2020 01:39:26 -0700 (PDT) X-Google-Smtp-Source: APiQypJ9J1MbhOtyMBfV3DaKsYi6DYbcg9GXZpmoZdmDe+jSrB0biCITClVZQWrTsqPaFr0nRYmG X-Received: by 2002:a05:6402:698:: with SMTP id f24mr16375984edy.260.1587458365903; Tue, 21 Apr 2020 01:39:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587458365; cv=none; d=google.com; s=arc-20160816; b=vdjs4S5/u6RFkGLz6B+WpqUrjBFB6jI7ATD9o908ItdnEb4lMU2vO2y38xVyKx+GhE WCde+ODaoPxG0J4oEvxaRHZq4T0BHw6ZFw2FNOTHwqAOKFD49gvB84LVeMguc9hus+Tg lf/DEhV2WcHam1yeZyFrv5O138ZKsIUQjBEotwVOIilFJe4oWsgGvSE7FxIHXi5HCVvh l9cMAi8SmJyztjRbRqLdI2q8I8e1Lq+ufoiHX6VdWbR3QCAJ/p2xzJATITv0R0GkKDzf bq31WIV7cT4jVj7t8VmaEO55Jdsi3wj9tlxH7l9lJHyQiL+dcb4QjF35mH3d9G8/pel3 8l1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=k3dktRcCka3FECUNwGFlYqwVa8z/sPTVnKMzv5bZL20=; b=hs0G2QdzSwL+B3tXolUtCWoum1VGIqLzMTu+6+HCumzJtLZFC3gDhVaHdcP8BUiLaW Mh+aXMMMFWiOtmIKQ4q7c2c+dP89NSLGFPddIfDQIE7uW0dFOEEUQTrjBLFQnXBphnin B7TXMKvCDHpbaL5xFDtzu8oIG4QrB/k7mlyUq8KGHdniBK27eE5RHqrkikV6NFx2nT9Z 16+sItniiZH3PdHp7ubRW1Vw2yiJe+dkRLkUqLSlIaCpEiGRVBJSEGKkzS+RpjIZw2Dh a8Br1sJ8qVFjCtpea3Wy/u6P/iClQD7ePHnQm9nTLcHYBwM8tlahDA+0+NBEpPCqzM7D qkGQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y9si1153001edu.7.2020.04.21.01.38.47; Tue, 21 Apr 2020 01:39:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728178AbgDUIhs convert rfc822-to-8bit (ORCPT + 99 others); Tue, 21 Apr 2020 04:37:48 -0400 Received: from gloria.sntech.de ([185.11.138.130]:46282 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726018AbgDUIhr (ORCPT ); Tue, 21 Apr 2020 04:37:47 -0400 Received: from ip5f5aa64a.dynamic.kabel-deutschland.de ([95.90.166.74] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jQoPZ-0001XI-1R; Tue, 21 Apr 2020 10:37:45 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Chen-Yu Tsai Cc: Johan Jonker , devicetree , Rob Herring , linux-kernel , linux-arm-kernel , "open list:ARM/Rockchip SoC..." Subject: Re: [PATCH 1/3] arm64: dts: rockchip: add bus-width properties to mmc nodes for rk3328.dtsi Date: Tue, 21 Apr 2020 10:37:44 +0200 Message-ID: <4769044.6T0MzsmYic@diego> In-Reply-To: References: <20200416181944.5879-1-jbx6244@gmail.com> <2710874.PL6qFFFsBp@diego> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="iso-8859-1" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Dienstag, 21. April 2020, 10:29:49 CEST schrieb Chen-Yu Tsai: > On Tue, Apr 21, 2020 at 4:23 PM Heiko St?bner wrote: > > > > Hi ChenYu, > > > > Am Dienstag, 21. April 2020, 05:48:52 CEST schrieb Chen-Yu Tsai: > > > On Fri, Apr 17, 2020 at 2:19 AM Johan Jonker wrote: > > > > > > > > 'bus-width' and pinctrl containing the bus-pins > > > > should be in the same file, so add them to > > > > all mmc nodes in 'rk3328.dtsi'. > > > > > > Nope. First of all, pinctrl usage is with pinctrl-N properties, not the > > > pinctrl device, and there are no defaults set for any of the mmc nodes. > > > Second, these are board design specific. For example, boards are free to > > > use just 4 bits for the eMMC if they so desire. So this should be in each > > > board dts file. If a board is missing this property, fix the board. > > > > you are correct that the pinctrl entries are missing from the patches, > > bus-width and pinctrl should be defined in the same file each time, > > but for the whole idea I tend to disagree. > > > > So far every board with a Rockchip socs follows Rockchip's reference design > > for a lot of parts - for example I only see sdmmc nodes with bus-width=4 > > etc. > > > > So the basic idea is to have default pinctrl settings for the settings > > everybody uses predefined ... if a board comes along that needs different > > settings it is free to redefine that. > > I think having a default is a great idea. :) especially for controllers that only ever use the same settings anyway.