Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp191790ybz; Tue, 21 Apr 2020 07:18:00 -0700 (PDT) X-Google-Smtp-Source: APiQypIJjBhL/Yynf2Kg3j4ddNLaF5y3thZJEFXxuhW6E7tti4I+QQAu0hM0uMGptcF1E3d5v6GI X-Received: by 2002:a17:906:2410:: with SMTP id z16mr21570297eja.1.1587478680525; Tue, 21 Apr 2020 07:18:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587478680; cv=none; d=google.com; s=arc-20160816; b=YGIUdOYC9T90rsE8nBbrfU8dOPCI9y35lT/VzfOqE0Ds8m+0upubn7Ip8vhJshrziX w1BEO53sE+LEvKjNmdrbYZThfJw+JSh4KmX20Se7O+E8cf5NGDO3QP3vWazpC9mNIG5S xPiF+P6XEtDJpj6EMRrMbpnHgkbU5AkaWyPM72m6PEmMv6IG8fw/y4ousVzGn9xWROCn IEB4YOkF+wL3cdcTP1fSymSG1NCXH+y9dH2aWktMslvxsyQsesTEe2QTtV5c6FjIGaF0 ff2+ttk/XQnEPjfn68L6fd5BPtJW6Hmjjg4pK7P72uvT3rwhKezA+nG7XcQp4rihjEpl Mh3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=+WNN7ggGAZ/2M/jMN7SHRu1L+RM6XwMxGmJOas1RGJE=; b=pSkUFYLyDvT46x1edv7KNkrCJgrhKzPutJZ5jNC0UbbGc8z9SBYuFdDZ9EICx9WkWH X5A2Wj5oiF8CVWz+zkDx4txwn9QR/5Rg0ShGEpEvTmpfpg00N0JcFKTWYFHmlgCTqJ2y 8M7wVAiUCLJ0x73XfN8urrdyMswiOFcA4ZpBrBAe0GZpLBTeNrwq1k3BpIWe4NQS11ZM 0H/t1owZpfh8MoA608JR2oasKSdzwKYl3V2QaoYsSmap4yh3UoG2KW6mUR4Z3jZjKO11 F1D5ZTt98D0rNjUiD60LbF08uJsiEXopuZYfhGSHTOZWtCVa4l0+HSkRfvk5w7zmYpKi Nn6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y13si1622628ede.350.2020.04.21.07.17.35; Tue, 21 Apr 2020 07:18:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728904AbgDUOP4 (ORCPT + 99 others); Tue, 21 Apr 2020 10:15:56 -0400 Received: from muru.com ([72.249.23.125]:50572 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728712AbgDUOPz (ORCPT ); Tue, 21 Apr 2020 10:15:55 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id CD62F8081; Tue, 21 Apr 2020 14:16:33 +0000 (UTC) Date: Tue, 21 Apr 2020 07:15:43 -0700 From: Tony Lindgren To: Maxime Ripard Cc: Philipp Rossak , "H. Nikolaus Schaller" , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , =?utf-8?Q?Beno=C3=AEt?= Cousson , Paul Cercueil , Ralf Baechle , Paul Burton , James Hogan , Kukjin Kim , Krzysztof Kozlowski , Chen-Yu Tsai , Thomas Bogendoerfer , "open list:DRM PANEL DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , linux-omap , OpenPVRSGX Linux Driver Group , Discussions about the Letux Kernel , kernel@pyra-handheld.com, linux-mips@vger.kernel.org, arm-soc , linux-samsung-soc@vger.kernel.org Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) Message-ID: <20200421141543.GU37466@atomide.com> References: <20200415101008.zxzxca2vlfsefpdv@gilmour.lan> <2E3401F1-A106-4396-8FE6-51CAB72926A4@goldelico.com> <20200415130233.rgn7xrtwqicptke2@gilmour.lan> <10969e64-fe1f-d692-4984-4ba916bd2161@gmail.com> <20200420073842.nx4xb3zqvu23arkc@gilmour.lan> <20200421112129.zjmkmzo3aftksgka@gilmour.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200421112129.zjmkmzo3aftksgka@gilmour.lan> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Maxime Ripard [200421 11:22]: > On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote: > > I had a look on genpd and I'm not really sure if that fits. > > > > It is basically some bit that verify that the clocks should be enabled or > > disabled. > > No, it can do much more than that. It's a framework to control the SoCs power > domains, so clocks might be a part of it, but most of the time it's going to be > about powering up a particular device. Note that on omaps there are actually SoC module specific registers. And there can be multiple devices within a single target module on omaps. So the extra dts node and device is justified there. For other SoCs, the SGX clocks are probably best handled directly in pvr-drv.c PM runtime functions unless a custom hardware wrapper with SoC specific registers exists. Regards, Tony