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References: <1586566362-21450-1-git-send-email-wcheng@codeaurora.org> <1586566362-21450-2-git-send-email-wcheng@codeaurora.org> <20200411010143.GF20625@builder.lan>
Subject: Re: [PATCH v4 1/2] clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     agross@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org,
        mark.rutland@arm.com, linux-arm-msm@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, vinod.koul@linaro.org
To:     Bjorn Andersson <bjorn.andersson@linaro.org>,
        Wesley Cheng <wcheng@codeaurora.org>
Date:   Wed, 22 Apr 2020 02:23:35 -0700
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Quoting Bjorn Andersson (2020-04-10 18:01:43)
> On Fri 10 Apr 17:52 PDT 2020, Wesley Cheng wrote:
>=20
> > This adds the USB3 PIPE clock and GDSC structures, so
> > that the USB driver can vote for these resources to be
> > enabled/disabled when required.  Both are needed for SS
> > and HS USB paths to operate properly.  The GDSC will
> > allow the USB system to be brought out of reset, while
> > the PIPE clock is needed for data transactions between
> > the PHY and controller.
> >=20
> > Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
> > Reviewed-by: Stephen Boyd <sboyd@kernel.org>
>=20
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>=20
>=20
> Stephen, let me know when you take this patch and I'll take the dts one.
>=20

Looks like I already applied it and it's merged in Linus' tree.