Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp869687ybz; Wed, 22 Apr 2020 09:22:25 -0700 (PDT) X-Google-Smtp-Source: APiQypJ3Yb8hCXvg4LQc3AO1IFPXiH2ttFO+biOWNXgZA2KgzPJu8khOPNi1ayVsAnX+fPiERo3x X-Received: by 2002:a05:6402:22f7:: with SMTP id dn23mr24582970edb.167.1587572544770; Wed, 22 Apr 2020 09:22:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587572544; cv=none; d=google.com; s=arc-20160816; b=R29VqPcsCuMpV52hjxOBOzpV4jWKzHS+bAnyNA7Y5UKz2YC2sKT4J/Cz753XbdtJMt Ezb8KxJdoO/UjNSI/711W83ZlF3qB8iwRGFItT5s8Mx06jxCC7Sf08/TfVlncUsWT46V 4Lf/PksJhmIqGOM8rMlglkw8MMxHF4LxH+SqXugmKn9gaRVjp9oDqoVRUDN5FsZrxqmM KAD+tCgUlRefx9fALuddIIfCNP2BARcZOvS8XyNIu2iLPFh2FfIt11uuWa8NktequpT/ ONzRLIpFu5FnnYSA9Hm3uQ4d2mHpSfpM4AvNPR4aEdcAfBUo2CyDg9JR876J54AGlP5y 5p7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:references :in-reply-to:subject:cc:to:from; bh=cQJnAiZzRq85+BxnLWZzdwcf31WWm/xg4gRx/1u0CkE=; b=T1pYxbMeURK3PguXKZiXkIvc4fyShouN7RWkYp1BShnMUGRaTQh+P0jhGWMh7mZ8IB ThPyqOFhqqDKtTZDjkuO3pasDj9+9WOene5q5KWYe3XVIo4O6m+sP3G6X202VoZRuvV4 xJfWLkhxp3cWc8m7pCYB8akJ/HXqvX5IZGs+YYBwW3tX8ZQcp+OS3C+dW8loHY/dT43w rrGxLjnxwDSwmmywMYWFUeTLCzMj/o87psGZp5u7yZwi5Dx5pwTh14cfqXnZS/MK72VP OsZkEmCCDLvTjuRYU/TtiLmf6qOFAU7S1j29bpdPDQ08qdh/TU/0PEC5USJHgTqRk4RW l69w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g3si3997846edj.328.2020.04.22.09.22.01; Wed, 22 Apr 2020 09:22:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726616AbgDVQSt (ORCPT + 99 others); Wed, 22 Apr 2020 12:18:49 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:47580 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726112AbgDVQSs (ORCPT ); Wed, 22 Apr 2020 12:18:48 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: aratiu) with ESMTPSA id 56C542A089E From: Adrian Ratiu To: Laurent Pinchart , Adrian Ratiu Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec , Heiko Stuebner , Jonas Karlman , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Andrzej Hajda , kernel@collabora.com, linux-stm32@st-md-mailman.stormreply.com, linux-imx@nxp.com, Rob Herring , Neil Armstrong , Fabio Estevam , Adrian Pop , Arnaud Ferraris , Sjoerd Simons , Martyn Welch Subject: Re: [PATCH v7 5/8] dt-bindings: display: add i.MX6 MIPI DSI host controller doc In-Reply-To: <20200422152956.GE28105@pendragon.ideasonboard.com> References: <20200421161610.1501827-1-adrian.ratiu@collabora.com> <20200421161610.1501827-6-adrian.ratiu@collabora.com> <20200422005832.GK5983@pendragon.ideasonboard.com> <20200422010155.GL5983@pendragon.ideasonboard.com> <877dy7ker6.fsf@collabora.com> <20200422152956.GE28105@pendragon.ideasonboard.com> Date: Wed, 22 Apr 2020 19:19:50 +0300 Message-ID: <87368vjxw9.fsf@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; format=flowed Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 22 Apr 2020, Laurent Pinchart wrote: > Hi Adrian, > > On Wed, Apr 22, 2020 at 01:15:41PM +0300, Adrian Ratiu wrote: >> On Wed, 22 Apr 2020, Laurent Pinchart wrote: >> > On Wed, Apr 22, 2020 at 03:58:33AM +0300, Laurent Pinchart >> > wrote: >> >> On Tue, Apr 21, 2020 at 07:16:07PM +0300, Adrian Ratiu >> >> wrote: >> >>> This provides an example DT binding for the MIPI DSI host >> >>> controller present on the i.MX6 SoC based on Synopsis >> >>> DesignWare v1.01 IP. Cc: Rob Herring >> >>> Cc: Neil Armstrong Cc: Fabio >> >>> Estevam Cc: Laurent Pinchart >> >>> Cc: >> >>> devicetree@vger.kernel.org Tested-by: Adrian Pop >> >>> Tested-by: Arnaud Ferraris >> >>> Signed-off-by: Sjoerd >> >>> Simons Signed-off-by: Martyn >> >>> Welch Signed-off-by: Adrian >> >>> Ratiu --- Changes since v6: >> >>> - Added ref to the newly created snps,dw-mipi-dsi.yaml >> >>> (Laurent) - Moved *-cells properties outside >> >>> patternProperties (Laurent) - Removed the panel port >> >>> documentation (Laurent) - Wrapped lines at 80 chars, typo >> >>> fixes, sort includes (Laurent) >> >>> Changes since v5: >> >>> - Fixed missing reg warning (Fabio) - Updated dt-schema >> >>> and fixed warnings (Rob) >> >>> Changes since v4: >> >>> - Fixed yaml binding to pass `make dt_binding_check >> >>> dtbs_check` and addressed received binding feedback (Rob) >> >>> Changes since v3: >> >>> - Added commit message (Neil) - Converted to yaml format >> >>> (Neil) - Minor dt node + driver fixes (Rob) - Added small >> >>> panel example to the host controller binding >> >>> Changes since v2: >> >>> - Fixed commit tags (Emil) >> >>> --- >> >>> .../display/imx/fsl,mipi-dsi-imx6.yaml | 135 >> >>> ++++++++++++++++++ 1 file changed, 135 insertions(+) >> >>> create mode 100644 >> >>> Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml >> >>> diff --git >> >>> a/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml >> >>> b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml >> >>> new file mode 100644 index 0000000000000..b73e3ae33a852 --- >> >>> /dev/null +++ >> >>> b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml >> >>> @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only >> >>> OR BSD-2-Clause) +%YAML 1.2 +--- +$id: >> >>> http://devicetree.org/schemas/display/imx/fsl,mipi-dsi-imx6.yaml# >> >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# + >> >>> +title: Freescale i.MX6 DW MIPI DSI Host Controller + >> >>> +maintainers: + - Adrian Ratiu >> >>> + +description: | + The >> >>> i.MX6 DSI host controller is a Synopsys DesignWare MIPI >> >>> DSI v1.01 + IP block with a companion PHY IP. >> > I forgot to mention, if there's a companion PHY, shouldn't >> > it be referenced from the DT bindings ? >> I don't think so, that description was copied verbatim from >> the imx6 ref manual IIRC, the physical layer is the same for >> MIPI DSI which does TX as for MIPI CSI which does RX, but >> looking at the ref manual and how drivers are written I don't >> think it's necessary. > > Does that mean that the PHY is controlled through the registers > specified by the reg property ? If so then this is fine. > Yes that is correct, there is just a single set of conf registers specified via reg. >> This might change if we wanted to unify the DSI and CSI drivers a >> bit, but considering the scope already associated with this patch >> series I'm a bit afraid to open a subject like that =) > > That's understandable :-) > >> >>> + >> >>> + These DT bindings follow the Synopsys DW MIPI DSI bindings defined in >> >>> + Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt with >> >>> + the following device-specific properties. >> >>> + >> >>> +allOf: >> >>> + - $ref: ../bridge/snps,dw-mipi-dsi.yaml# >> >>> + >> >>> +properties: >> >>> + '#address-cells': >> >>> + const: 1 >> >>> + >> >>> + '#size-cells': >> >>> + const: 0 >> >>> + >> >>> + compatible: >> >>> + items: >> >>> + - const: fsl,imx6q-mipi-dsi >> >>> + - const: snps,dw-mipi-dsi >> >>> + >> >>> + reg: >> >>> + maxItems: 1 >> >>> + >> >>> + interrupts: >> >>> + maxItems: 1 >> >>> + >> >>> + clocks: >> >>> + items: >> >>> + - description: Module Clock >> >>> + - description: DSI bus clock >> >>> + >> >>> + clock-names: >> >>> + items: >> >>> + - const: ref >> >>> + - const: pclk >> >>> + >> >>> + fsl,gpr: >> >>> + description: >> >>> + Phandle to the iomuxc-gpr region containing the multiplexer ctrl register. >> >>> + $ref: /schemas/types.yaml#/definitions/phandle >> >>> + >> >>> + ports: >> >>> + type: object >> >>> + description: | >> >>> + A node containing DSI input & output port nodes with endpoint >> >>> + definitions as documented in >> >>> + Documentation/devicetree/bindings/media/video-interfaces.txt >> >>> + Documentation/devicetree/bindings/graph.txt >> >>> + properties: >> >>> + port@0: >> >>> + type: object >> >>> + description: >> >>> + DSI input port node, connected to the ltdc rgb output port. >> >>> + >> >>> + port@1: >> >>> + type: object >> >>> + description: >> >>> + RGB output port node, connected to a panel or a bridge input port. >> >> >> >> Isn't it the other way around, doesn't the bridge take RGB input and >> >> output DSI ? And to be precise, it's not about RGB, but about the input >> >> being parallel interface (DSI will also carry RGB). >> >> >> >> I would add >> >> >> >> required: >> >> - port@0 >> >> - port@1 >> >> >> >>> + >> >>> +additionalProperties: false >> >>> + >> >>> +patternProperties: >> >>> + "^panel@[0-3]$": >> >>> + type: object >> >>> + >> >>> +required: >> >>> + - "#address-cells" >> >>> + - "#size-cells" >> >>> + - compatible >> >>> + - reg >> >>> + - interrupts >> >>> + - clocks >> >>> + - clock-names >> >>> + - ports >> >>> + >> >>> +examples: >> >>> + - |+ >> >>> + #include >> >>> + #include >> >>> + #include >> >>> + >> >>> + dsi: dsi@21e0000 { >> >>> + #address-cells = <1>; >> >>> + #size-cells = <0>; >> >>> + compatible = "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi"; >> >>> + reg = <0x021e0000 0x4000>; >> >>> + interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; >> >>> + fsl,gpr = <&gpr>; >> >>> + clocks = <&clks IMX6QDL_CLK_MIPI_CORE_CFG>, >> >>> + <&clks IMX6QDL_CLK_MIPI_IPG>; >> >>> + clock-names = "ref", "pclk"; >> >>> + >> >>> + ports { >> >>> + #address-cells = <1>; >> >>> + #size-cells = <0>; >> >> >> >> port@0 is missing. >> >> >> >>> + port@1 { >> >>> + reg = <1>; >> >>> + dsi_out: endpoint { >> >>> + remote-endpoint = <&panel_in>; >> >>> + }; >> >>> + }; >> >>> + }; >> >>> + >> >>> + panel@0 { >> >>> + compatible = "sharp,ls032b3sx01"; >> >>> + reg = <0>; >> >>> + reset-gpios = <&gpio6 8 GPIO_ACTIVE_LOW>; >> >>> + ports { >> >>> + #address-cells = <1>; >> >>> + #size-cells = <0>; >> >>> + port@0 { >> >>> + reg = <0>; >> >>> + panel_in: endpoint { >> >>> + remote-endpoint = <&dsi_out>; >> >>> + }; >> >>> + }; >> >>> + }; >> >>> + }; >> >>> + }; >> >>> + >> >>> +... > > -- > Regards, > > Laurent Pinchart