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From:   Huacai Chen <chenhc@lemote.com>
Date:   Thu, 23 Apr 2020 13:55:36 +0800
Message-ID: <CAAhV-H43ds5YnW+h3zpbwedT0Lksz_o5d=Sz0Uqn+--uuDHN1A@mail.gmail.com>
Subject: Re: [PATCH 6/6] dt-bindings: interrupt-controller: Add Loongson PCH MSI
To:     Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc:     "open list:MIPS" <linux-mips@vger.kernel.org>,
        Marc Zyngier <maz@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>,
        Rob Herring <robh+dt@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>, devicetree@vger.kernel.org
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Sender: linux-kernel-owner@vger.kernel.org
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Hi, Jiaxun,

On Wed, Apr 22, 2020 at 10:28 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> Add binding for Loongson PCH MSI controller.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  .../loongson,pch-msi.yaml                     | 56 +++++++++++++++++++
>  1 file changed, 56 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml
> new file mode 100644
> index 000000000000..dfb9cecacba0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Loongson PCH MSI Controller
> +
> +maintainers:
> +  - Jiaxun Yang <jiaxun.yang@flygoat.com>
> +
> +description: |
> +  This interrupt controller is found in the Loongson-7A family of PCH for
Please use "Loongson's LS7A family" here.

> +  transforming interrupts from PCIe MSI into HyperTransport vectorized
> +  interrupts.
> +
> +properties:
> +  compatible:
> +    const: loongson,pch-msi-1.0
> +
> +  reg:
> +    maxItems: 1
> +
> +  loongson,msi-base-vec:
> +    $ref: '/schemas/types.yaml#/definitions/uint32'
> +    description: |
> +      u32 value of the base of parent HyperTransport vector allocated
> +      to PCH MSI.
> +
> +  loongson,msi-num-vecs:
> +    $ref: '/schemas/types.yaml#/definitions/uint32'
> +    description: |
> +      u32 value of the number of parent HyperTransport vectors allocated
> +      to PCH MSI.
> +
> +  msi-controller: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - msi-controller
> +  - loongson,msi-base-vec
> +  - loongson,msi-num-vecs
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    msi: msi-controller@2ff00000 {
> +      compatible = "loongson,pch-msi-1.0";
> +      reg = <0x2ff00000 0x4>;
> +      msi-controller;
> +      loongson,msi-base-vec = <64>;
> +      loongson,msi-num-vecs = <64>;
> +      interrupt-parent = <&htvec>;
> +    };
> +...
> --
> 2.26.0.rc2
>