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From:   Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
To:     Alan Mikhak <alan.mikhak@sifive.com>,
        "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        "kishon@ti.com" <kishon@ti.com>, "maz@kernel.org" <maz@kernel.org>,
        "paul.walmsley@sifive.com" <paul.walmsley@sifive.com>
Subject: RE: [PATCH v2][next] dmaengine: dw-edma: Check MSI descriptor before
 copying
Thread-Topic: [PATCH v2][next] dmaengine: dw-edma: Check MSI descriptor before
 copying
Thread-Index: AQHWGRLFZJySbqPiH0S3r+K2E1djb6iGcOIA
Date:   Thu, 23 Apr 2020 09:28:28 +0000
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On Thu, Apr 23, 2020 at 2:58:21, Alan Mikhak <alan.mikhak@sifive.com>=20
wrote:

> From: Alan Mikhak <alan.mikhak@sifive.com>
>=20
> Modify dw_edma_irq_request() to check if a struct msi_desc entry exists
> before copying the contents of its struct msi_msg pointer.
>=20
> Without this sanity check, __get_cached_msi_msg() crashes when invoked by
> dw_edma_irq_request() running on a Linux-based PCIe endpoint device. MSI
> interrupt are not received by PCIe endpoint devices. If irq_get_msi_desc(=
)
> returns null, then there is no cached struct msi_msg to be copied.
>=20
> This patch depends on the following patch:
> [PATCH v2] dmaengine: dw-edma: Decouple dw-edma-core.c from struct pci_de=
v
> https://urldefense.com/v3/__https://patchwork.kernel.org/patch/11491757/_=
_;!!A4F2R9G_pg!L_vf_Tml7Ca4sWVvZp5crRCp7YsMj6B93G9cMAO8Dj3w9I0MArjwuwNKtDz9=
rr0RlpXiqPg$=20
>=20
> Rebased on linux-next which has above patch applied.
>=20
> Fixes: Build error with config x86_64-randconfig-f003-20200422
> Fixes: Build error with config s390-allmodconfig
> Reported-by: kbuild test robot <lkp@intel.com>
> Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
> ---
>  drivers/dma/dw-edma/dw-edma-core.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
>=20
> diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-=
edma-core.c
> index db401eb11322..306ab50462be 100644
> --- a/drivers/dma/dw-edma/dw-edma-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-core.c
> @@ -13,6 +13,7 @@
>  #include <linux/dmaengine.h>
>  #include <linux/err.h>
>  #include <linux/interrupt.h>
> +#include <linux/irq.h>
>  #include <linux/dma/edma.h>
>  #include <linux/dma-mapping.h>
> =20
> @@ -773,6 +774,7 @@ static int dw_edma_irq_request(struct dw_edma_chip *c=
hip,
>  	u32 rd_mask =3D 1;
>  	int i, err =3D 0;
>  	u32 ch_cnt;
> +	int irq;
> =20
>  	ch_cnt =3D dw->wr_ch_cnt + dw->rd_ch_cnt;
> =20
> @@ -781,16 +783,16 @@ static int dw_edma_irq_request(struct dw_edma_chip =
*chip,
> =20
>  	if (dw->nr_irqs =3D=3D 1) {
>  		/* Common IRQ shared among all channels */
> -		err =3D request_irq(dw->ops->irq_vector(dev, 0),
> -				  dw_edma_interrupt_common,
> +		irq =3D dw->ops->irq_vector(dev, 0);
> +		err =3D request_irq(irq, dw_edma_interrupt_common,
>  				  IRQF_SHARED, dw->name, &dw->irq[0]);
>  		if (err) {
>  			dw->nr_irqs =3D 0;
>  			return err;
>  		}
> =20
> -		get_cached_msi_msg(dw->ops->irq_vector(dev, 0),
> -				   &dw->irq[0].msi);
> +		if (irq_get_msi_desc(irq))
> +			get_cached_msi_msg(irq, &dw->irq[0].msi);
>  	} else {
>  		/* Distribute IRQs equally among all channels */
>  		int tmp =3D dw->nr_irqs;
> @@ -804,7 +806,8 @@ static int dw_edma_irq_request(struct dw_edma_chip *c=
hip,
>  		dw_edma_add_irq_mask(&rd_mask, *rd_alloc, dw->rd_ch_cnt);
> =20
>  		for (i =3D 0; i < (*wr_alloc + *rd_alloc); i++) {
> -			err =3D request_irq(dw->ops->irq_vector(dev, i),
> +			irq =3D dw->ops->irq_vector(dev, i);
> +			err =3D request_irq(irq,
>  					  i < *wr_alloc ?
>  						dw_edma_interrupt_write :
>  						dw_edma_interrupt_read,
> @@ -815,8 +818,8 @@ static int dw_edma_irq_request(struct dw_edma_chip *c=
hip,
>  				return err;
>  			}
> =20
> -			get_cached_msi_msg(dw->ops->irq_vector(dev, i),
> -					   &dw->irq[i].msi);
> +			if (irq_get_msi_desc(irq))
> +				get_cached_msi_msg(irq, &dw->irq[i].msi);
>  		}
> =20
>  		dw->nr_irqs =3D i;
> --=20
> 2.7.4


Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>