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Date:   Fri, 24 Apr 2020 14:16:26 +0200
From:   Peter Zijlstra <peterz@infradead.org>
To:     Like Xu <like.xu@linux.intel.com>
Cc:     Paolo Bonzini <pbonzini@redhat.com>,
        Sean Christopherson <sean.j.christopherson@intel.com>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Jim Mattson <jmattson@google.com>,
        Joerg Roedel <joro@8bytes.org>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org, wei.w.wang@intel.com,
        ak@linux.intel.com
Subject: Re: [PATCH v10 08/11] KVM: x86/pmu: Add LBR feature emulation via
 guest LBR event
Message-ID: <20200424121626.GB20730@hirez.programming.kicks-ass.net>
References: <20200423081412.164863-1-like.xu@linux.intel.com>
 <20200423081412.164863-9-like.xu@linux.intel.com>
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On Thu, Apr 23, 2020 at 04:14:09PM +0800, Like Xu wrote:
> +static int intel_pmu_create_lbr_event(struct kvm_vcpu *vcpu)
> +{
> +	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
> +	struct perf_event *event;
> +
> +	/*
> +	 * The perf_event_attr is constructed in the minimum efficient way:
> +	 * - set 'pinned = true' to make it task pinned so that if another
> +	 *   cpu pinned event reclaims LBR, the event->oncpu will be set to -1;
> +	 *
> +	 * - set 'sample_type = PERF_SAMPLE_BRANCH_STACK' and
> +	 *   'exclude_host = true' to mark it as a guest LBR event which
> +	 *   indicates host perf to schedule it without but a fake counter,
> +	 *   check is_guest_lbr_event() and intel_guest_event_constraints();
> +	 *
> +	 * - set 'branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
> +	 *   PERF_SAMPLE_BRANCH_USER' to configure it to use callstack mode,
> +	 *   which allocs 'ctx->task_ctx_data' and request host perf subsystem
> +	 *   to save/restore guest LBR records during host context switches,
> +	 *   check branch_user_callstack() and intel_pmu_lbr_sched_task();
> +	 */
> +	struct perf_event_attr attr = {
> +		.type = PERF_TYPE_RAW,

This is not right; this needs a .config

And I suppose that is why you need that horrible:
needs_guest_lbr_without_counter() thing to begin with.

Please allocate yourself an event from the pseudo event range:
event==0x00. Currently we only have umask==3 for Fixed2 and umask==4
for Fixed3, given you claim 58, which is effectively Fixed25,
umask==0x1a might be appropriate.

Also, I suppose we need to claim 0x0000 as an error, so that other
people won't try this again.

> +		.size = sizeof(attr),
> +		.pinned = true,
> +		.exclude_host = true,
> +		.sample_type = PERF_SAMPLE_BRANCH_STACK,
> +		.branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
> +					PERF_SAMPLE_BRANCH_USER,
> +	};
> +
> +	if (unlikely(pmu->lbr_event))
> +		return 0;
> +
> +	event = perf_event_create_kernel_counter(&attr, -1,
> +						current, NULL, NULL);
> +	if (IS_ERR(event)) {
> +		pr_debug_ratelimited("%s: failed %ld\n",
> +					__func__, PTR_ERR(event));
> +		return -ENOENT;
> +	}
> +	pmu->lbr_event = event;
> +	pmu->event_count++;
> +	return 0;
> +}

Also, what happens if you fail programming due to a conflicting cpu
event? That pinned doesn't guarantee you'll get the event, it just means
you'll error instead of getting RR.

I didn't find any code checking the event state.