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[23.128.96.18]) by mx.google.com with ESMTP id k15si3889914edk.194.2020.04.24.11.48.11; Fri, 24 Apr 2020 11:48:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eiUU8Sfm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729389AbgDXSp2 (ORCPT + 99 others); Fri, 24 Apr 2020 14:45:28 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:34836 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729114AbgDXSpW (ORCPT ); Fri, 24 Apr 2020 14:45:22 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 03OIjBOr095340; Fri, 24 Apr 2020 13:45:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1587753911; bh=jWGv+gfQVR8og0vXoFT/e0mwOt9DQrg1vbzZ2T99E5E=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eiUU8SfmaeL6gudqHzBvR3AU8wP2O0MRWbN3cQ6mZbBR+2RcmO8vR7dvf6fuxY1W/ IjoS+i/4/UVPIeSUmuY5wEezttQFYoONNsIVprVRYdScXlHTrbZ6a4UIxO8IIzei3E BCWWfL0WJT18dqaRngU1fmI2PopUoE+LLMIptJ0I= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 03OIjBhU023137 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 24 Apr 2020 13:45:11 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 24 Apr 2020 13:45:11 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 24 Apr 2020 13:45:11 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 03OIiAaK047967; Fri, 24 Apr 2020 13:45:08 -0500 From: Pratyush Yadav To: Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , , , , CC: Pratyush Yadav , Sekhar Nori Subject: [PATCH v4 14/16] mtd: spi-nor: expose spi_nor_default_setup() in core.h Date: Sat, 25 Apr 2020 00:14:08 +0530 Message-ID: <20200424184410.8578-15-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200424184410.8578-1-p.yadav@ti.com> References: <20200424184410.8578-1-p.yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Flashes might want to add a custom setup hook to configure the flash in the proper mode for operation. But after that, they would still want to run the default setup hook because it selects the read, program, and erase operations. Since there is little point in repeating all that code, expose the spi_nor_default_setup() in core.h to manufacturer-specific files. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 4 ++-- drivers/mtd/spi-nor/core.h | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index b9b9c2b9a3da..cfd78aeacc88 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2785,8 +2785,8 @@ static int spi_nor_select_erase(struct spi_nor *nor) return 0; } -static int spi_nor_default_setup(struct spi_nor *nor, - const struct spi_nor_hwcaps *hwcaps) +int spi_nor_default_setup(struct spi_nor *nor, + const struct spi_nor_hwcaps *hwcaps) { struct spi_nor_flash_parameter *params = nor->params; u32 ignored_mask, shared_mask; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 86c31357b321..00bf6b35ec3e 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -453,6 +453,9 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_bfpt *bfpt, struct spi_nor_flash_parameter *params); +int spi_nor_default_setup(struct spi_nor *nor, + const struct spi_nor_hwcaps *hwcaps); + static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd) { return mtd->priv; -- 2.25.0