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Date:   Mon, 27 Apr 2020 10:05:18 +0100
From:   Lee Jones <lee.jones@linaro.org>
To:     Baolin Wang <baolin.wang7@gmail.com>
Cc:     Arnd Bergmann <arnd@arndb.de>, Mark Brown <broonie@kernel.org>,
        Orson Zhai <orsonzhai@gmail.com>,
        Chunyan Zhang <zhang.lyra@gmail.com>,
        LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3] mfd: syscon: Add Spreadtrum physical regmap bus
 support
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On Mon, 27 Apr 2020, Baolin Wang wrote:

> Hi Arnd and Lee,
> 
> On Tue, Apr 21, 2020 at 10:13 PM Baolin Wang <baolin.wang7@gmail.com> wrote:
> >
> > Some platforms such as Spreadtrum platform, define a special method to
> > update bits of the registers instead of read-modify-write, which means
> > we should use a physical regmap bus to define the reg_update_bits()
> > operation instead of the MMIO regmap bus. Thus we can register a new
> > physical regmap bus into syscon core to support this.
> >
> > Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
> 
> Do you have any comments for this patch? Thanks.

Yes.  I'm not accepting it, sorry.

I'd rather you duplicate the things you need from of_syscon_register()
in your own driver than taint this one.

> > ---
> > Changes from v2:
> >  - Fix building errors without enabling CONFIG_ARCH_SPRD.
> >
> > Changes from v1:
> >  - Add WARN_ONCE() for seting bits and clearing bits at the same time.
> >  - Remove the Spreadtrum SoC syscon driver, instead moving the regmap_bus
> >  instance into syscon.c driver.
> >
> > Changes from RFC v2:
> >  - Drop regmap change, which was applied by Mark.
> >  - Add more information about how to use set/clear.
> >  - Add checking to ensure the platform is compatible with
> >  using a new physical regmap bus.
> >
> > Changes from RFC v1:
> >  - Add new helper to registers a physical regmap bus instead of
> >  using the MMIO bus.
> > ---
> >  drivers/mfd/syscon.c | 83 ++++++++++++++++++++++++++++++++++++++++++--
> >  1 file changed, 81 insertions(+), 2 deletions(-)

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
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