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[23.128.96.18]) by mx.google.com with ESMTP id h7si8002655eds.336.2020.04.27.05.23.20; Mon, 27 Apr 2020 05:23:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@flygoat.com header.s=vultr header.b=RtqBsWDg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726769AbgD0MVz (ORCPT + 99 others); Mon, 27 Apr 2020 08:21:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726390AbgD0MVy (ORCPT ); Mon, 27 Apr 2020 08:21:54 -0400 Received: from vultr.net.flygoat.com (vultr.net.flygoat.com [IPv6:2001:19f0:6001:3633:5400:2ff:fe8c:553]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB936C0610D5; Mon, 27 Apr 2020 05:21:54 -0700 (PDT) Received: from flygoat-x1e (unknown [IPv6:240e:390:491:f2b0::d68]) by vultr.net.flygoat.com (Postfix) with ESMTPSA id DF81620CCC; Mon, 27 Apr 2020 12:21:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=flygoat.com; s=vultr; t=1587990112; bh=R1+k3dAQgTnnM31r1i4S/QU+lBsdeL1PrW/jJlxBHmI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=RtqBsWDgq2Fv6x6mm8Wd5brjrHoAZt0ZN2ma/YfHpVEGTMePCXxWWOROLNXeCQIHw JEYiYpgtO0V28OozpxRfJLoHXhjKtaO5PY1QiDXWPHATy7Ks3RZC+5PeSkCr3hHx41 EM1W0Wzd9RMkiqMAdrxKndZtI6fA/oDAxah+6QGNklzHvapgnaJpSihb7nyYZgQJYX dWPeq/3s1nH2/xE2FD2LipDyIKuCRyVwgRsFgr3miA1Wf8JgS8s7Qdtn4WkEVSZHyV aAeKSRvLg9u0rW8tETU1kbi9qs/A4tV95XCiw7T+NnTuHqez3pUHcoD9Flqiyl5xZc zGRv5i1H0u1VA== Date: Mon, 27 Apr 2020 20:21:29 +0800 From: Jiaxun Yang To: John Garry Cc: Arnd Bergmann , Bjorn Helgaas , , Thomas Bogendoerfer , Huacai Chen , Paul Burton , Thomas Gleixner , Stephen Kitt , Nick Desaulniers , Serge Semin , Anshuman Khandual , Geert Uytterhoeven , Andrew Morton , Daniel Silsby , Mike Rapoport , Paul Cercueil , Mark Tomlinson , Greg Kroah-Hartman , Allison Randal , Tiezhu Yang , Wei Xu , , Linuxarm , Rob Herring , linux-arch Subject: Re: [PATCH 3/4] lib: logic_pio: Introduce MMIO_LOWER_RESERVED Message-ID: <20200427202129.34f8807e@flygoat-x1e> In-Reply-To: References: <20200426114806.1176629-1-jiaxun.yang@flygoat.com> <20200426114806.1176629-4-jiaxun.yang@flygoat.com> <42432F7C-D859-48B4-9547-A61BD22EFEEF@flygoat.com> X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 27 Apr 2020 12:54:06 +0100 John Garry wrote: > On 27/04/2020 12:03, Jiaxun Yang wrote: > >=20 > >=20 > > =E4=BA=8E 2020=E5=B9=B44=E6=9C=8827=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D= =886:43:09, John Garry > > =E5=86=99=E5=88=B0: =20 > >> On 26/04/2020 12:47, Jiaxun Yang wrote: =20 > >>> That would allow platforms reserve some lower address in PIO MMIO > >>> range to deal with legacy drivers with hardcoded I/O ports that > >>> can't be managed by logic_pio. =20 > >> > >> Hi, > >> > >> Is there some reason why the logic_pio code cannot be improved to > >> handle these devices at these "fixed" addresses? Or do you have a > >> plan to improve it? We already support fixed bus address devices > >> in the INDIRECT IO region. =20 > >=20 > > Hi, > >=20 > > The issue about "Fixed Address" is we can't control the ioport > > That driver used to operate devices. > > So any attempt to resolve it in logic_pio seems impossible. > >=20 > > Currently we have i8259, i8042, piix4_smbus, mc146818 rely on this > > assumption. =20 >=20 > Right, and from glancing at a couple of drivers you mentioned, if we=20 > were to register a logic pio region for that legacy region, there > does not seem to be an easy place to fixup to use logic pio addresses > (for those devices). They use hardcoded values. However if all those > drivers were mips specific, you could fixup those drivers to use > logic_pio addresses today through some macro. But not sure on that. >=20 Well, most of these drivers are shared with x86 so.... I guess the conversion needs two or more release cycles. >=20 > So, going back to your change, I have a dilemma wondering whether you=20 > should still register a logic pio region for the legacy region > instead of the carveout reservation, but ensure it is the first > region registered, such that logic pio address base is 0 and no > translation is required. At least then you have a region registered > and it shows in /proc/ioports, but then this whole thing becomes a > bit fragile. Thanks for your solution. So I must register this range as early as possible. As IRQ is the first subsystem using ISA, I'll do it before IRQ init, just at the place I setup iormap for reserved region now. Should be early enough to avoid any collision, as the only logic_pio user on our system is PCI controller. Thanks. >=20 -- Jiaxun Yang