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[23.128.96.18]) by mx.google.com with ESMTP id ck5si430180ejb.12.2020.04.27.13.19.56; Mon, 27 Apr 2020 13:20:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=SrVJHLVx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726954AbgD0UN3 (ORCPT + 99 others); Mon, 27 Apr 2020 16:13:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726850AbgD0UMx (ORCPT ); Mon, 27 Apr 2020 16:12:53 -0400 Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 208BFC0610D5; Mon, 27 Apr 2020 13:12:52 -0700 (PDT) Received: by mail-wm1-x343.google.com with SMTP id u127so341685wmg.1; Mon, 27 Apr 2020 13:12:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=x1zonVb/BbRigHqP69T8VBwuU0bduWhkzmHUC7793dM=; b=SrVJHLVxg21IVO23W2AGolBEV2fVOJXFbod/kjJ1H1wEPl5pEpJr/F/wRuYBSvaPWY ebs82S2n+w7pEciImNGMDyjj8WMYy0aFXxC2/h9xMrFKDeDFD7y1GUgA+J7T65aZFtjk xs+8LWL+QAjxaLOkJg9LLwL9VMN9sHcKKDqheNk8/Uv65WB4ddP3F8IGqQKJlx6szR0X 13rb5/Jl77mFcKUcs1VlFO8s+TDBcBnOUf+nvG3h0PwECAejKS6TUcY7YcuNV1S+a10p JQO1hN/3SQkDv+hdIAHZMpeywFRqxk9wNr4gbu9Nh2EoW21Qa1Ef2IMIpI9ioWIklA9s Nhlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=x1zonVb/BbRigHqP69T8VBwuU0bduWhkzmHUC7793dM=; b=fLtling7ZjvO2p88wh2xhe2x628x3B2NonXUWZPEAWsYjDVrfzdJmxtOBFzzHxUxBe QVfJewwkUFOxVqWbo+tW7KS6EJGgIciOPD3JevWTTMsp1GkjHDZBT/dgpFdI9vRSqaXE 9P2oBH5sy4aUrW2cp8fHYuJJ0B2++qWciFkfPVL6BZwL6TxppWhnXBXKQKWNDFfsLfrw 9vimFMiiGtOqBLkG9pI5BSFKB2W6HpWoeXBmgHNatzo8Z/namT3/QCT8N9VzvGD8hk3d PUGHD/vYwDR4UnE+Pzeyuj/6BHP2tWivH+S4Z35iv817TKtGgOmWKWt460P3IuX2aKF0 8lSg== X-Gm-Message-State: AGi0PubVWnzbKPW2/56X23+atzO6ZylaKvMcJuFmSRJs82v7nscomvYP MSlCbH187Tbwdx3rpxMP1I70V7GxZMKGzN/0oBI= X-Received: by 2002:a7b:c74d:: with SMTP id w13mr436755wmk.36.1588018370739; Mon, 27 Apr 2020 13:12:50 -0700 (PDT) MIME-Version: 1.0 References: <20200427103048.20785-1-benchuanggli@gmail.com> In-Reply-To: <20200427103048.20785-1-benchuanggli@gmail.com> From: Vineeth Pillai Date: Mon, 27 Apr 2020 16:12:39 -0400 Message-ID: Subject: Re: [PATCH] mmc: sdhci-pci-gli: Fix no irq handler from suspend To: Ben Chuang Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?B?QmVuQ2h1YW5nW+iOiuaZuumHj10=?= , =?UTF-8?B?UmVuaXVzQ2hlblvpmbPlu7rlro9d?= , dflogeras2@gmail.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tested-by: Vineeth Pillai Thanks, Vineeth On Mon, Apr 27, 2020 at 6:30 AM Ben Chuang wrote: > > From: Ben Chuang > > The kernel prints a message similar to > "[ 28.881959] do_IRQ: 5.36 No irq handler for vector" > when GL975x resumes from suspend. Implement a resume callback to fix this. > > Fixes: 31e43f31890c ("mmc: sdhci-pci-gli: Enable MSI interrupt for GL975x") > Co-developed-by: Renius Chen > Signed-off-by: Renius Chen > Tested-by: Dave Flogeras > Signed-off-by: Ben Chuang > --- > drivers/mmc/host/sdhci-pci-gli.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c > index ce15a05f23d4..7195dd33ac3d 100644 > --- a/drivers/mmc/host/sdhci-pci-gli.c > +++ b/drivers/mmc/host/sdhci-pci-gli.c > @@ -334,6 +334,18 @@ static u32 sdhci_gl9750_readl(struct sdhci_host *host, int reg) > return value; > } > > +#ifdef CONFIG_PM_SLEEP > +int sdhci_pci_gli_resume(struct sdhci_pci_chip *chip) > +{ > + struct sdhci_pci_slot *slot = chip->slots[0]; > + > + pci_free_irq_vectors(slot->chip->pdev); > + gli_pcie_enable_msi(slot); > + > + return sdhci_pci_resume_host(chip); > +} > +#endif > + > static const struct sdhci_ops sdhci_gl9755_ops = { > .set_clock = sdhci_set_clock, > .enable_dma = sdhci_pci_enable_dma, > @@ -348,6 +360,9 @@ const struct sdhci_pci_fixes sdhci_gl9755 = { > .quirks2 = SDHCI_QUIRK2_BROKEN_DDR50, > .probe_slot = gli_probe_slot_gl9755, > .ops = &sdhci_gl9755_ops, > +#ifdef CONFIG_PM_SLEEP > + .resume = sdhci_pci_gli_resume, > +#endif > }; > > static const struct sdhci_ops sdhci_gl9750_ops = { > @@ -366,4 +381,7 @@ const struct sdhci_pci_fixes sdhci_gl9750 = { > .quirks2 = SDHCI_QUIRK2_BROKEN_DDR50, > .probe_slot = gli_probe_slot_gl9750, > .ops = &sdhci_gl9750_ops, > +#ifdef CONFIG_PM_SLEEP > + .resume = sdhci_pci_gli_resume, > +#endif > }; > -- > 2.26.2 > -- Cheers, ~Vineeth ## "Its not the load that breaks you, but the way u carry it!" ##