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Subject: Re: [PATCH v29 00/20] Intel SGX foundations
To:     Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
        linux-kernel@vger.kernel.org, x86@kernel.org,
        linux-sgx@vger.kernel.org
Cc:     akpm@linux-foundation.org, dave.hansen@intel.com,
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        andriy.shevchenko@linux.intel.com, tglx@linutronix.de,
        kai.svahn@intel.com, bp@alien8.de, josh@joshtriplett.org,
        luto@kernel.org, kai.huang@intel.com, rientjes@google.com,
        cedric.xing@intel.com, puiterwijk@redhat.com
References: <20200421215316.56503-1-jarkko.sakkinen@linux.intel.com>
From:   Jethro Beekman <jethro@fortanix.com>
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On 2020-04-21 23:52, Jarkko Sakkinen wrote:
> Intel(R) SGX is a set of CPU instructions that can be used by applicati=
ons
> to set aside private regions of code and data. The code outside the enc=
lave
> is disallowed to access the memory inside the enclave by the CPU access=

> control.
>=20
> There is a new hardware unit in the processor called Memory Encryption
> Engine (MEE) starting from the Skylake microacrhitecture. BIOS can defi=
ne
> one or many MEE regions that can hold enclave data by configuring them =
with
> PRMRR registers.
>=20
> The MEE automatically encrypts the data leaving the processor package t=
o
> the MEE regions. The data is encrypted using a random key whose life-ti=
me
> is exactly one power cycle.
>=20
> The current implementation requires that the firmware sets
> IA32_SGXLEPUBKEYHASH* MSRs as writable so that ultimately the kernel ca=
n
> decide what enclaves it wants run. The implementation does not create
> any bottlenecks to support read-only MSRs later on.
>=20
> You can tell if your CPU supports SGX by looking into /proc/cpuinfo:
>=20
> 	cat /proc/cpuinfo  | grep sgx

Let's merge this.

--
Jethro Beekman | Fortanix


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