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[2003:f1:3714:2e00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id q143sm9923623wme.31.2020.04.29.13.17.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2020 13:17:11 -0700 (PDT) From: Martin Blumenstingl To: robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org Cc: jianxin.pan@amlogic.com, davem@davemloft.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Martin Blumenstingl Subject: [PATCH RFC v2 01/11] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property Date: Wed, 29 Apr 2020 22:16:34 +0200 Message-Id: <20200429201644.1144546-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200429201644.1144546-1-martin.blumenstingl@googlemail.com> References: <20200429201644.1144546-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PRG_ETHERNET registers on Meson8b and newer SoCs can add an RX delay. Add a property with the known supported values so it can be configured according to the board layout. Signed-off-by: Martin Blumenstingl --- .../bindings/net/amlogic,meson-dwmac.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index ae91aa9d8616..8d851f59d9f2 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -67,6 +67,19 @@ allOf: PHY and MAC are adding a delay). Any configuration is ignored when the phy-mode is set to "rmii". + amlogic,rx-delay-ns: + $ref: /schemas/types.yaml#definitions/uint32 + enum: + - 0 + - 2 + description: + The internal RGMII RX clock delay (provided by this IP block) in + nanoseconds. When phy-mode is set to "rgmii" then the RX delay + should be explicitly configured. When not configured a fallback of + 0ns is used. When the phy-mode is set to either "rgmii-id" or + "rgmii-rxid" the RX clock delay is already provided by the PHY. + Any configuration is ignored when the phy-mode is set to "rmii". + properties: compatible: additionalItems: true -- 2.26.2