Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp1098493ybz; Wed, 29 Apr 2020 15:03:12 -0700 (PDT) X-Google-Smtp-Source: APiQypJgO9Pg8gWFzzvZG3VGdIIspvSIflK+T+ojdnnY1cNhtbOHA2GkKlevh5Kvm+I1b83LKqXx X-Received: by 2002:a17:906:2418:: with SMTP id z24mr4716594eja.42.1588197791845; Wed, 29 Apr 2020 15:03:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588197791; cv=none; d=google.com; s=arc-20160816; b=wTxwDSXa6PDI0sPYs6AlnsIu7m7xt5lKOINkLhOAw5/T3fNv4kqQm/734LQxoxW7OA vwb5HhzZhIIrPqaERssp6oR3PjEXDV+KpJqyNsM9D++7GK0myO9/QPGUgz7iQyYFDvQ+ 9AOWVrGeakR+Ehe1F8bgCCQsZp1Tee1tjUjHk/z0+yuIT2f9jEMZ0Pp+9lxkf/AMN1Zz u+EKZfk6CtWPn/Yih+C9J2ja9fJpsJEA9iuLizHoBftkgcij+78TzLYxyCzu5L3hJNSR xbvsmG7tUnrXVQ1S3tts37k3b/zU3KZ0c08DvaOUfQpGsSzwUzDIOi3YVL6XWJW+6VWR ke3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=fypsljnYXUQBk09pkBuzFp0S2nxT0B9eauugx/SlCBI=; b=IgHpLtLjqJVNpEZXLomfjHk8ETKhqIzgxAyM7mllgDNrQtvTk3q8u+tbqEbS3uljjy i2Yjei1kaOUqgrHISDHzouVS2gpKEAbW63xIGDIieJYMmH+YpAFfi2/6dkzc4MGM3Adk xsiVCX4+/xYH6+9c7jPMigr9+Z0lhnOLMnPnCnrRUnhJ5+SYLyzm/KcajEqpkilMeGja JvEGPVYoos0Cke7KKEOL/EDS0iZvkoiDFH3kodvVlluUB5gwD3hSCFKfOHUirBEReoKD 7PdXJ+3gZcb7YL/stQjAYPBT+uQ0CkDXuu2lfSDOqZaSWO5VpiNNYZ7P8ry0CSSHxmk8 UshA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=fJNGHUKQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id lw2si4574256ejb.328.2020.04.29.15.02.48; Wed, 29 Apr 2020 15:03:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=fJNGHUKQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727906AbgD2WB3 (ORCPT + 99 others); Wed, 29 Apr 2020 18:01:29 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:14825 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726554AbgD2WB0 (ORCPT ); Wed, 29 Apr 2020 18:01:26 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 29 Apr 2020 15:00:19 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 29 Apr 2020 15:01:25 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 29 Apr 2020 15:01:25 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 29 Apr 2020 22:01:25 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 29 Apr 2020 22:01:25 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.165.152]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 29 Apr 2020 15:01:25 -0700 From: Sowjanya Komatineni To: , , , , , , CC: , , , , , , Subject: [RFC PATCH v11 2/9] arm64: tegra: Add reset-cells to mc Date: Wed, 29 Apr 2020 14:59:59 -0700 Message-ID: <1588197606-32124-3-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588197606-32124-1-git-send-email-skomatineni@nvidia.com> References: <1588197606-32124-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1588197619; bh=fypsljnYXUQBk09pkBuzFp0S2nxT0B9eauugx/SlCBI=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=fJNGHUKQXapa4+aEMingAMCmJVv+2sxq09n4mP0VhUE7g/lsITZt/LlrSXfYdbdVv oar50E8cvooWHfy4d97gwkqYy/2d39ZTidpuWnYI527Yi3Qa+46XnzMT15GZTP6nIu 0MRJAHZVhlx3YCC2kC8qoJipTkx6IB1ecQXHazPXPFCLfcAZbqxHzs7tyNwOCkpczH i0Ohfa/HFN2R82HDvTWGswOHpJzO9hnQGWu2p3VXpeJCjNWad5PJ96IB661Z2Idqzy r/apCZabvQHUpNS6VMSLX0AxG1AesMmPrzPkQ5Rspa60vciH2xCJDy7a1S5tp1fQUf jsY2PMXnFVXDA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tegra210 device tree is missing reset-cells property for mc node. This patch fixes it. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index d0eff92..5b1dfd8 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -894,6 +894,7 @@ interrupts = ; #iommu-cells = <1>; + #reset-cells = <1>; }; sata@70020000 { -- 2.7.4