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[23.128.96.18]) by mx.google.com with ESMTP id v1si4783215edr.198.2020.04.29.18.04.55; Wed, 29 Apr 2020 18:05:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726743AbgD3BBH (ORCPT + 99 others); Wed, 29 Apr 2020 21:01:07 -0400 Received: from inva021.nxp.com ([92.121.34.21]:37990 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726626AbgD3BBA (ORCPT ); Wed, 29 Apr 2020 21:01:00 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C8A862005F8; Thu, 30 Apr 2020 03:00:57 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B6F812005E9; Thu, 30 Apr 2020 03:00:52 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C2EDD4030E; Thu, 30 Apr 2020 09:00:46 +0800 (SGT) From: Anson Huang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Linux-imx@nxp.com Subject: [PATCH V4 5/5] dt-bindings: clock: Convert i.MX6UL clock to json-schema Date: Thu, 30 Apr 2020 08:52:01 +0800 Message-Id: <1588207921-20604-5-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588207921-20604-1-git-send-email-Anson.Huang@nxp.com> References: <1588207921-20604-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the i.MX6UL clock binding to DT schema format using json-schema. Signed-off-by: Anson Huang --- Changes since V3: - update license to be with (GPL-2.0-only OR BSD-2-Clause); - remove unnecessary minItem for interrupts; - remove label in example. --- .../devicetree/bindings/clock/imx6ul-clock.txt | 13 ----- .../devicetree/bindings/clock/imx6ul-clock.yaml | 60 ++++++++++++++++++++++ 2 files changed, 60 insertions(+), 13 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/imx6ul-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/imx6ul-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/imx6ul-clock.txt b/Documentation/devicetree/bindings/clock/imx6ul-clock.txt deleted file mode 100644 index 571d503..0000000 --- a/Documentation/devicetree/bindings/clock/imx6ul-clock.txt +++ /dev/null @@ -1,13 +0,0 @@ -* Clock bindings for Freescale i.MX6 UltraLite - -Required properties: -- compatible: Should be "fsl,imx6ul-ccm" -- reg: Address and length of the register set -- #clock-cells: Should be <1> -- clocks: list of clock specifiers, must contain an entry for each required - entry in clock-names -- clock-names: should include entries "ckil", "osc", "ipp_di0" and "ipp_di1" - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6ul-clock.h -for the full list of i.MX6 UltraLite clock IDs. diff --git a/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml new file mode 100644 index 0000000..e1477df --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx6ul-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock bindings for Freescale i.MX6 UltraLite + +maintainers: + - Anson Huang + +properties: + compatible: + const: fsl,imx6ul-ccm + + reg: + maxItems: 1 + + interrupts: + maxItems: 2 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: 32k osc + - description: 24m osc + - description: ipp_di0 clock input + - description: ipp_di1 clock input + + clock-names: + items: + - const: ckil + - const: osc + - const: ipp_di0 + - const: ipp_di1 + +required: + - compatible + - reg + - interrupts + - '#clock-cells' + - clocks + - clock-names + +examples: + # Clock Control Module node: + - | + #include + + clock-controller@20c4000 { + compatible = "fsl,imx6ul-ccm"; + reg = <0x020c4000 0x4000>; + interrupts = , + ; + #clock-cells = <1>; + clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>; + clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; + }; -- 2.7.4