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Thu, 30 Apr 2020 07:19:58 +0000 Subject: Re: [PATCH v29 00/20] Intel SGX foundations To: Jarkko Sakkinen Cc: linux-kernel@vger.kernel.org, x86@kernel.org, linux-sgx@vger.kernel.org, akpm@linux-foundation.org, dave.hansen@intel.com, sean.j.christopherson@intel.com, nhorman@redhat.com, npmccallum@redhat.com, haitao.huang@intel.com, andriy.shevchenko@linux.intel.com, tglx@linutronix.de, kai.svahn@intel.com, bp@alien8.de, josh@joshtriplett.org, luto@kernel.org, kai.huang@intel.com, rientjes@google.com, cedric.xing@intel.com, puiterwijk@redhat.com References: <20200421215316.56503-1-jarkko.sakkinen@linux.intel.com> <07c1a36c-cebc-3a65-6f92-4a5498fcc369@fortanix.com> <20200430034651.GB31820@linux.intel.com> From: Jethro Beekman Message-ID: Date: Thu, 30 Apr 2020 09:19:48 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 In-Reply-To: <20200430034651.GB31820@linux.intel.com> Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; 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charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 2020-04-30 05:46, Jarkko Sakkinen wrote: > On Wed, Apr 29, 2020 at 05:27:48PM +0200, Jethro Beekman wrote: >> On 2020-04-21 23:52, Jarkko Sakkinen wrote: >>> Intel(R) SGX is a set of CPU instructions that can be used by applica= tions >>> to set aside private regions of code and data. The code outside the e= nclave >>> is disallowed to access the memory inside the enclave by the CPU acce= ss >>> control. >>> >>> There is a new hardware unit in the processor called Memory Encryptio= n >>> Engine (MEE) starting from the Skylake microacrhitecture. BIOS can de= fine >>> one or many MEE regions that can hold enclave data by configuring the= m with >>> PRMRR registers. >>> >>> The MEE automatically encrypts the data leaving the processor package= to >>> the MEE regions. The data is encrypted using a random key whose life-= time >>> is exactly one power cycle. >>> >>> The current implementation requires that the firmware sets >>> IA32_SGXLEPUBKEYHASH* MSRs as writable so that ultimately the kernel = can >>> decide what enclaves it wants run. The implementation does not create= >>> any bottlenecks to support read-only MSRs later on. >>> >>> You can tell if your CPU supports SGX by looking into /proc/cpuinfo: >>> >>> cat /proc/cpuinfo | grep sgx >> >> Let's merge this. >=20 > So can I tag reviewed-by's? >=20 No, but you already have my tested-by's. If it helps I can try to review some patches, but 1) I know nothing about= kernel coding guidelines and best practices and 2) I know little about m= ost kernel internals, so I won't be able to review every patch. -- Jethro Beekman | Fortanix --------------ms010702010600080702080303 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCC C54wggVPMIIEN6ADAgECAhAFFr+cC0ZYZTtbKgQCBwyyMA0GCSqGSIb3DQEBCwUAMIGCMQsw CQYDVQQGEwJJVDEPMA0GA1UECAwGTWlsYW5vMQ8wDQYDVQQHDAZNaWxhbm8xIzAhBgNVBAoM GkFjdGFsaXMgUy5wLkEuLzAzMzU4NTIwOTY3MSwwKgYDVQQDDCNBY3RhbGlzIENsaWVudCBB dXRoZW50aWNhdGlvbiBDQSBHMTAeFw0xOTA5MTYwOTQ3MDlaFw0yMDA5MTYwOTQ3MDlaMB4x HDAaBgNVBAMME2pldGhyb0Bmb3J0YW5peC5jb20wggEiMA0GCSqGSIb3DQEBAQUAA4IBDwAw ggEKAoIBAQDHWEhcRGkEl1ZnImSqBt/OXNJ4AyDZ86CejuWI9jYpWbtf/gXBQO6iaaEKBDlj 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